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Sec 2 - Computer Org: MIPS, ARM, x86 A CPU core contains which blocks: O Execution Unit + L1 caches O ALU + L2 cache O ALU + Registers O L1 caches + Registers Question 8 An x86 CPU, 32-bit contains: O 32-bit ALU O All of these O SI, DI, CS, SS registers O EAX, EBX. ECX, EDX registers

Sec 2 - Computer Org: MIPS, ARM, x86 A CPU core contains which blocks: O Execution Unit + L1 caches O ALU + L2 cache O ALU + Registers O L1 caches + Registers Question 8 An x86 CPU, 32-bit contains: O 32-bit ALU O All of these O SI, DI, CS, SS registers O EAX, EBX. ECX, EDX registers

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Question 7 Sec 2 - Computer Org: MIPS, ARM, x86 A CPU core contains which blocks: Execution Unit + L1 caches O ALU + L2 cache O ALU + Registers O L1 caches + Registers Question 8 An x86 CPU, 32-bit contains: O 32-bit ALU O All of these O SI, DI, CS, SS registers O EAX, EBX. ECX, EDX registers
Transcribed Image Text:Question 7 Sec 2 - Computer Org: MIPS, ARM, x86 A CPU core contains which blocks: Execution Unit + L1 caches O ALU + L2 cache O ALU + Registers O L1 caches + Registers Question 8 An x86 CPU, 32-bit contains: O 32-bit ALU O All of these O SI, DI, CS, SS registers O EAX, EBX. ECX, EDX registers
Question 3 An ARMV7 "I-format" immediate value as an unsigned constant can range from 0 to: O 1023 O 4095 O 24 O 16,384 Question 4 ARMV7 primitives that MIPS does not have: O call, jump O syscall, lui O push, bkpt, dbg O addi, subi
Transcribed Image Text:Question 3 An ARMV7 "I-format" immediate value as an unsigned constant can range from 0 to: O 1023 O 4095 O 24 O 16,384 Question 4 ARMV7 primitives that MIPS does not have: O call, jump O syscall, lui O push, bkpt, dbg O addi, subi
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