3. Given the Tomasulo's algorithm diagram, and we know that it has two major features. (a) Point out what these two major features are. Clearly explain what advantages each of these two features can bring us. (b) Using the diagram, clearly explain how each of these two features is implemented. (c) In some situations we want to put in a reorder buffer (ROB). (d) Continued from (c), explain how the system works so that it can now fulfill the requirement(s making us put in the ROB (explicitly noting if any of the original Tomasulo's algorithm function(s) have been offloaded to other components). Why do we do this?
3. Given the Tomasulo's algorithm diagram, and we know that it has two major features. (a) Point out what these two major features are. Clearly explain what advantages each of these two features can bring us. (b) Using the diagram, clearly explain how each of these two features is implemented. (c) In some situations we want to put in a reorder buffer (ROB). (d) Continued from (c), explain how the system works so that it can now fulfill the requirement(s making us put in the ROB (explicitly noting if any of the original Tomasulo's algorithm function(s) have been offloaded to other components). Why do we do this?
Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Transcribed Image Text:3.
Given the Tomasulo's algorithm diagram, and we know that it has two major features.
(a) Point out what these two major features are. Clearly explain what advantages each of these
two features can bring us.
(b) Using the diagram, clearly explain how each of these two features is implemented.
(c) In some situations we want to put in a reorder buffer (ROB).
(d) Continued from (c), explain how the system works so that it can now fulfill the requirement(s)
making us put in the ROB (explicitly noting if any of the original Tomasulo's algorithm
function(s) have been offloaded to other components).
Why do we do this?
Transcribed Image Text:From instruction unit
Instruction
FP registers
queue
Loadistore
operations
Floating-polnt
operations
Operand
buses
Address unit
Store buffers
Load buffers
Operation bus
3
2
Reservation
stations
1
Data
Address
Memory unit
FP adders
FP multipliers
Common data bus (CDB)
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