Q2. (a) Figure 2 shows the pinout diagram (and their functional description) of the 2114 Static RAM memory IC. Using a neat sketch show how such IC may be interfaced with an M68000 microprocessor to realise a system that needs 1K x 16 bits of RAM. [Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit data bus of the M68000 processor.] A6 1 A5 2 18 Vcc 17 A7 Ao-Ag WE CS Pin Names Address Inputs Write Enable Chip Select
Q2. (a) Figure 2 shows the pinout diagram (and their functional description) of the 2114 Static RAM memory IC. Using a neat sketch show how such IC may be interfaced with an M68000 microprocessor to realise a system that needs 1K x 16 bits of RAM. [Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit data bus of the M68000 processor.] A6 1 A5 2 18 Vcc 17 A7 Ao-Ag WE CS Pin Names Address Inputs Write Enable Chip Select
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![Q2.
(a) Figure 2 shows the pinout diagram (and their functional description) of the
2114 Static RAM memory IC. Using a neat sketch show how such IC may be
interfaced with an M68000 microprocessor to realise a system that needs
1K x 16 bits of RAM.
[Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit
data bus of the M68000 processor.]
A6 1
A5 2
A4 3
A3 4
AO 5
A1
6
A2 7
CS 8
GND 9
18 Vcc
17 A7
16 A8
15 A9
14 I/O 1
13 1/0 2
12 1/0 3
11 1/0 4
10 WE
ROM1
ROM2
ROM3
RAM
Ao-Ag
WE
CS
Figure 2
1/01-1/04
Vcc
GND
Truth Table
CS
H
L
L
WE
X
L
H
00 0000-00 1FFF
00 2000 - 00 3FFF
00 400000 7FFF
04 0000 - OF FFFF.
Pin Names
Address Inputs
Write Enable
Chip Select
Data Input/Output
Power (+5V)
Ground
(b) Determine the logic expressions to implement an address decoding circuit to
realize the memory address map shown below. Use partial address decoding
technique in your design. You only need to show the truth table and the resulting
logic equations. No need to draw the decoder circuit.
Comments
Chip Deselected
Write
Read
[Note: memory addresses are shown in hexadecimal notation.]](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F150e333d-1b66-4db1-95e9-ef20b9394620%2F4e328dc8-c469-41db-be25-cdea969e0cf2%2F3avgth_processed.png&w=3840&q=75)
Transcribed Image Text:Q2.
(a) Figure 2 shows the pinout diagram (and their functional description) of the
2114 Static RAM memory IC. Using a neat sketch show how such IC may be
interfaced with an M68000 microprocessor to realise a system that needs
1K x 16 bits of RAM.
[Note: 2114 is a 4-bit memory IC. You will need multiple ICs to make up the 16-bit
data bus of the M68000 processor.]
A6 1
A5 2
A4 3
A3 4
AO 5
A1
6
A2 7
CS 8
GND 9
18 Vcc
17 A7
16 A8
15 A9
14 I/O 1
13 1/0 2
12 1/0 3
11 1/0 4
10 WE
ROM1
ROM2
ROM3
RAM
Ao-Ag
WE
CS
Figure 2
1/01-1/04
Vcc
GND
Truth Table
CS
H
L
L
WE
X
L
H
00 0000-00 1FFF
00 2000 - 00 3FFF
00 400000 7FFF
04 0000 - OF FFFF.
Pin Names
Address Inputs
Write Enable
Chip Select
Data Input/Output
Power (+5V)
Ground
(b) Determine the logic expressions to implement an address decoding circuit to
realize the memory address map shown below. Use partial address decoding
technique in your design. You only need to show the truth table and the resulting
logic equations. No need to draw the decoder circuit.
Comments
Chip Deselected
Write
Read
[Note: memory addresses are shown in hexadecimal notation.]
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