*M** G X1 X2 X y (a) Using the given I/O table for G, construct an I/O table for the following circuit, including a column for each of a, b, c, d. You may ignore output e altogether. G X1 0 b 0 1 1 x2 y/1 Y2 0 1 1 1 0 0 0 1 1 1 0 G d e (ignore) (b) Find the DNF for the output d (as a function of inputs x, y, z) and use a Karnaugh map to find a minimal expression for d. (c) Using your minimal expression for d in part (b), give a logic circuit for d that uses only AND, OR and NOT gates (that is, without G).

Introductory Circuit Analysis (13th Edition)
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*M**
G
X1
X2
X
y
(a) Using the given I/O table for G, construct an I/O table for the following circuit, including a column for
each of a, b, c, d. You may ignore output e altogether.
G
X1
0
b
0
1
1
x2 y/1 Y2
0
1 1
1
0 0
0
1
1
1 0
G
d
e (ignore)
(b) Find the DNF for the output d (as a function of inputs x, y, z) and use a Karnaugh map to find a minimal
expression for d.
(c) Using your minimal expression for d in part (b), give a logic circuit for d that uses only AND, OR and
NOT gates (that is, without G).
Transcribed Image Text:*M** G X1 X2 X y (a) Using the given I/O table for G, construct an I/O table for the following circuit, including a column for each of a, b, c, d. You may ignore output e altogether. G X1 0 b 0 1 1 x2 y/1 Y2 0 1 1 1 0 0 0 1 1 1 0 G d e (ignore) (b) Find the DNF for the output d (as a function of inputs x, y, z) and use a Karnaugh map to find a minimal expression for d. (c) Using your minimal expression for d in part (b), give a logic circuit for d that uses only AND, OR and NOT gates (that is, without G).
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