Logic Equation Y1: The logic circuit: SOP Equation Y1 = ABC + ABC + ABC + AB Number of gates used in the circuit: 2-Input AND gate. gates 2-Input OR gate gates NOT gate. gates Number of idle gates in the chip: 2-Input AND gate. 2-Input OR gate. NOT gate, gates gates gates IC name: IC name: IC name:

Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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Logic Equation Y1:
The logic circuit:
Workshop 02
Combinational Logic Simplification
SOP Equation
Y1 = ABC + ABC + ABC + AB
Number of gates used in the circuit:
2-Input AND gate
2-Input OR gate
NOT gate
Number of idle gates in the chip:
2-Input AND gate
2-Input OR gate
NOT gate.
gates
gates
gates
gates
gates
gates
IC name:
IC name:
IC name:
EEN213 Workshop 02| Page 1-6
Transcribed Image Text:Logic Equation Y1: The logic circuit: Workshop 02 Combinational Logic Simplification SOP Equation Y1 = ABC + ABC + ABC + AB Number of gates used in the circuit: 2-Input AND gate 2-Input OR gate NOT gate Number of idle gates in the chip: 2-Input AND gate 2-Input OR gate NOT gate. gates gates gates gates gates gates IC name: IC name: IC name: EEN213 Workshop 02| Page 1-6
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