1. Describe the difference between a combinational and sequential circuit. What is the critical combinational path?

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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1. Describe the difference between a combinational and sequential circuit. What is the critical
combinational path?
2. Circle the critical combinational path through this circuit, and
calculate the propagation delay, tpd, with units (show your work):
X1
* *
के जे
D
Đ
GATE
2-input AND
2-input OR
tpd (ns)
25
30
D Q
3. Assuming the combinational logic above is the next-state logic of a FSM, and using flip-flops for
state memory with the following timing characteristics (from the 74LS74):
t=25 ns
t₂ =20 ns
t₁ = 5 ns
a. What is the minimum clock period, I min? Maximum clock frequency, f max? Show your
work and label your values with units.
b. Assuming a 5 MHz clock, what is the setup time margin? If you are unsure of your
answer above, you may use 185 ns as your I min
Transcribed Image Text:1. Describe the difference between a combinational and sequential circuit. What is the critical combinational path? 2. Circle the critical combinational path through this circuit, and calculate the propagation delay, tpd, with units (show your work): X1 * * के जे D Đ GATE 2-input AND 2-input OR tpd (ns) 25 30 D Q 3. Assuming the combinational logic above is the next-state logic of a FSM, and using flip-flops for state memory with the following timing characteristics (from the 74LS74): t=25 ns t₂ =20 ns t₁ = 5 ns a. What is the minimum clock period, I min? Maximum clock frequency, f max? Show your work and label your values with units. b. Assuming a 5 MHz clock, what is the setup time margin? If you are unsure of your answer above, you may use 185 ns as your I min
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