Design a Verilog code and testbench for a Common Anode 7-Segment Display Decoder to display numbers from 0 to 9. Use Continuous Assignment with Conditional Operators in the Verilog code. a) First, complete the truth table for the common anode 7-segment decoder. The inputs are labeled as DCBA (4-bit input representing decimal values 0-9), and the outputs are segments a, b, c, d, e, f, g that correspond to each segment of the display. Fill in the segments for each input value to show numbers from 0 to 9. DCBA " b c d e f br 0000 (0) 1 1 1 0001 (1) 0 1 1 10 0010 (2) 1 1 0 1 0011 (3) 1 1 1 1 0100 (4) 0 1 1 0 0101 (5) 1 0 1 1 0110 (6) 1 0 1 1 0111 (7) 1 1 1 0 10100010 1 0 0 0 0 1 0 1 1 1 1 1 1 1 0 0 1000 (8) 1 1 1 1 1 1 1 1001 (9) 1 1 1 1 0 1 1 8 8 8 8 8 68889 d weight BOD input 8 C Decoder D (7447) " OND • Decimal output 3300 Common anode b) Write the Verilog code for the common anode 7-segment decoder, using continuous assignment statements and conditional operators to assign values to each segment a, b, c, d, e, f, and g. Assume that in all other cases, the segment is OFF [Set time scale to Ins/1ps]. Verilog Code c) Write the Verilog testbench code to test the 7-segment decoder for all input states from 0 to 9. The testbench should: 1. Apply all inputs (from 0 to 9) sequentially to the 7-segment decoder. 2. Print the output to the TCL console in the following format: Input (DCBA) Output Segment (a, b, c, d, e, f, g) Where DCBA in decimal and Output segment code in binary. Testbench Code
Design a Verilog code and testbench for a Common Anode 7-Segment Display Decoder to display numbers from 0 to 9. Use Continuous Assignment with Conditional Operators in the Verilog code. a) First, complete the truth table for the common anode 7-segment decoder. The inputs are labeled as DCBA (4-bit input representing decimal values 0-9), and the outputs are segments a, b, c, d, e, f, g that correspond to each segment of the display. Fill in the segments for each input value to show numbers from 0 to 9. DCBA " b c d e f br 0000 (0) 1 1 1 0001 (1) 0 1 1 10 0010 (2) 1 1 0 1 0011 (3) 1 1 1 1 0100 (4) 0 1 1 0 0101 (5) 1 0 1 1 0110 (6) 1 0 1 1 0111 (7) 1 1 1 0 10100010 1 0 0 0 0 1 0 1 1 1 1 1 1 1 0 0 1000 (8) 1 1 1 1 1 1 1 1001 (9) 1 1 1 1 0 1 1 8 8 8 8 8 68889 d weight BOD input 8 C Decoder D (7447) " OND • Decimal output 3300 Common anode b) Write the Verilog code for the common anode 7-segment decoder, using continuous assignment statements and conditional operators to assign values to each segment a, b, c, d, e, f, and g. Assume that in all other cases, the segment is OFF [Set time scale to Ins/1ps]. Verilog Code c) Write the Verilog testbench code to test the 7-segment decoder for all input states from 0 to 9. The testbench should: 1. Apply all inputs (from 0 to 9) sequentially to the 7-segment decoder. 2. Print the output to the TCL console in the following format: Input (DCBA) Output Segment (a, b, c, d, e, f, g) Where DCBA in decimal and Output segment code in binary. Testbench Code
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
Related questions
Question
Transcribed Image Text:Design a Verilog code and testbench for a Common Anode 7-Segment Display Decoder to display
numbers from 0 to 9. Use Continuous Assignment with Conditional Operators in the Verilog
code.
a) First, complete the truth table for the common anode 7-segment decoder. The inputs are labeled
as DCBA (4-bit input representing decimal values 0-9), and the outputs are segments a, b, c, d, e,
f, g that correspond to each segment of the display.
Fill in the segments for each input value to show numbers from 0 to 9.
DCBA
"
b
c
d
e
f
br
0000 (0) 1
1
1
0001 (1)
0
1
1
10
0010 (2)
1
1
0
1
0011 (3)
1
1
1
1
0100 (4)
0
1
1
0
0101 (5)
1
0
1
1
0110 (6) 1
0
1
1
0111 (7)
1
1
1
0
10100010
1 0
0
0
0
1
0
1
1
1
1
1
1
1
0
0
1000 (8)
1
1
1
1
1
1
1
1001 (9)
1
1
1
1
0
1
1
8 8 8 8 8
68889
d
weight
BOD
input
8
C
Decoder
D (7447) "
OND
•
Decimal output
3300
Common
anode
![b) Write the Verilog code for the common anode 7-segment decoder, using continuous assignment
statements and conditional operators to assign values to each segment a, b, c, d, e, f, and g.
Assume that in all other cases, the segment is OFF [Set time scale to Ins/1ps].
Verilog Code
c) Write the Verilog testbench code to test the 7-segment decoder for all input states from 0 to 9.
The testbench should:
1. Apply all inputs (from 0 to 9) sequentially to the 7-segment decoder.
2. Print the output to the TCL console in the following format:
Input (DCBA) Output Segment (a, b, c, d, e, f, g)
Where DCBA in decimal and Output segment code in binary.
Testbench Code](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff0c7c0e9-1042-4b47-9e78-c6aaeaae6479%2F85ccf8c1-3656-4d40-9d6b-6c22948ebaeb%2F9nihr88_processed.png&w=3840&q=75)
Transcribed Image Text:b) Write the Verilog code for the common anode 7-segment decoder, using continuous assignment
statements and conditional operators to assign values to each segment a, b, c, d, e, f, and g.
Assume that in all other cases, the segment is OFF [Set time scale to Ins/1ps].
Verilog Code
c) Write the Verilog testbench code to test the 7-segment decoder for all input states from 0 to 9.
The testbench should:
1. Apply all inputs (from 0 to 9) sequentially to the 7-segment decoder.
2. Print the output to the TCL console in the following format:
Input (DCBA) Output Segment (a, b, c, d, e, f, g)
Where DCBA in decimal and Output segment code in binary.
Testbench Code
Expert Solution
This question has been solved!
Explore an expertly crafted, step-by-step solution for a thorough understanding of key concepts.
Step by step
Solved in 2 steps
Recommended textbooks for you
Computer Networking: A Top-Down Approach (7th Edi…
Computer Engineering
ISBN:
9780133594140
Author:
James Kurose, Keith Ross
Publisher:
PEARSON
Computer Organization and Design MIPS Edition, Fi…
Computer Engineering
ISBN:
9780124077263
Author:
David A. Patterson, John L. Hennessy
Publisher:
Elsevier Science
Network+ Guide to Networks (MindTap Course List)
Computer Engineering
ISBN:
9781337569330
Author:
Jill West, Tamara Dean, Jean Andrews
Publisher:
Cengage Learning
Computer Networking: A Top-Down Approach (7th Edi…
Computer Engineering
ISBN:
9780133594140
Author:
James Kurose, Keith Ross
Publisher:
PEARSON
Computer Organization and Design MIPS Edition, Fi…
Computer Engineering
ISBN:
9780124077263
Author:
David A. Patterson, John L. Hennessy
Publisher:
Elsevier Science
Network+ Guide to Networks (MindTap Course List)
Computer Engineering
ISBN:
9781337569330
Author:
Jill West, Tamara Dean, Jean Andrews
Publisher:
Cengage Learning
Concepts of Database Management
Computer Engineering
ISBN:
9781337093422
Author:
Joy L. Starks, Philip J. Pratt, Mary Z. Last
Publisher:
Cengage Learning
Prelude to Programming
Computer Engineering
ISBN:
9780133750423
Author:
VENIT, Stewart
Publisher:
Pearson Education
Sc Business Data Communications and Networking, T…
Computer Engineering
ISBN:
9781119368830
Author:
FITZGERALD
Publisher:
WILEY