Design a counter which counts from (0011)2 to (1110)2 using 74x163 IC and externa gates. The counter should start counting when an active-low ENABLE (EN_L) input asserted. CLR OI U160 Vcc 150 RCO 140 DA | ag 120 ac CLK d2 13 ENPO GND d 100 ENT 9 |LOAD Fig. 1. Block diagram of 74x163 IC.

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Design a counter which counts from (0011)_2 to (1110)_2 using 74x163 IC and external gates. The counter should start counting when an active-low ENABLE (EN_L) input is asserted.

Design a counter which counts from (0011)2 to (1110)2 using 74x163 IC and external
gates. The counter should start counting when an active-low ENABLE (EN_L) input is
asserted.
CLR
1 O16
150 RCO
14 QA
4
CLK O2
ALJ3
130 ag
12 Oc
J6
B
110 OD
10 ENT
LOAD
D
ENPO7
GND
8
Fig. 1. Block diagram of 74x163 ICc.
Transcribed Image Text:Design a counter which counts from (0011)2 to (1110)2 using 74x163 IC and external gates. The counter should start counting when an active-low ENABLE (EN_L) input is asserted. CLR 1 O16 150 RCO 14 QA 4 CLK O2 ALJ3 130 ag 12 Oc J6 B 110 OD 10 ENT LOAD D ENPO7 GND 8 Fig. 1. Block diagram of 74x163 ICc.
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