Design a combinational logic circuit to obtain the following functionality. Using the input as Opcode and the output as QA which is then stored using an 8-bit Register made of simple D- Type flip flops which are evaluated on the rising edge of the clock. The register has a synchronous reset. Use Xilinx Vivado to build a VHDL circuit to perform this function. Your code must be properly commented. Please use VHDL code Opcode 000 001 010 011 100 101 110 111 Logic Function Q=A OR not(B) Q = B Q = not(A) AND B Q = not (B) Q = not(A XOR B) Q = not(A) Q = Q = not(A OR B) Q = (A OR "11001101")
Design a combinational logic circuit to obtain the following functionality. Using the input as Opcode and the output as QA which is then stored using an 8-bit Register made of simple D- Type flip flops which are evaluated on the rising edge of the clock. The register has a synchronous reset. Use Xilinx Vivado to build a VHDL circuit to perform this function. Your code must be properly commented. Please use VHDL code Opcode 000 001 010 011 100 101 110 111 Logic Function Q=A OR not(B) Q = B Q = not(A) AND B Q = not (B) Q = not(A XOR B) Q = not(A) Q = Q = not(A OR B) Q = (A OR "11001101")
Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
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![Design a combinational logic circuit to obtain the following functionality. Using the input as
Opcode and the output as QA which is then stored using an 8-bit Register made of simple D-
Type flip flops which are evaluated on the rising edge of the clock. The register has a
synchronous reset.
Use Xilinx Vivado to build a VHDL circuit to perform this function. Your code must be
properly commented. Please use VHDL code
Opcode
000
001
010
011
100
101
110
111
Logic Function
Q = A OR not(B)
Q = B
Q = not(A) AND B
Q = not (B)
Q = not(A XOR B)
Q = not(A)
Q = Q = not(A OR B)
Q = (A OR "11001101")](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2Ff97f03da-270c-49d6-9a71-be1dee3f943b%2F158a6a99-8871-46db-92b1-111823564543%2F6rc90k_processed.png&w=3840&q=75)
Transcribed Image Text:Design a combinational logic circuit to obtain the following functionality. Using the input as
Opcode and the output as QA which is then stored using an 8-bit Register made of simple D-
Type flip flops which are evaluated on the rising edge of the clock. The register has a
synchronous reset.
Use Xilinx Vivado to build a VHDL circuit to perform this function. Your code must be
properly commented. Please use VHDL code
Opcode
000
001
010
011
100
101
110
111
Logic Function
Q = A OR not(B)
Q = B
Q = not(A) AND B
Q = not (B)
Q = not(A XOR B)
Q = not(A)
Q = Q = not(A OR B)
Q = (A OR "11001101")
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