D 4.7 For the logic gate of Fig. 4.5(a), assume ideal diodes and input voltage levels of 0 V and +5 V. Find a suitable value for R so that the current required from each of the input signal sources does not exceed 0.2 mA.

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피아 자
D₁
Figure P4.5
I
마
D2
흐
=
B
Vo
Transcribed Image Text:피아 자 D₁ Figure P4.5 I 마 D2 흐 = B Vo
D 4.7 For the logic gate of Fig. 4.5(a), assume ideal diodes
and input voltage levels of 0 V and +5 V. Find a suitable
value for R so that the current required from each of the input
signal sources does not exceed 0.2 mA.
Transcribed Image Text:D 4.7 For the logic gate of Fig. 4.5(a), assume ideal diodes and input voltage levels of 0 V and +5 V. Find a suitable value for R so that the current required from each of the input signal sources does not exceed 0.2 mA.
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