ck cycle. When E = 0, it stops counting and output stays unchanged. clr is clear input. When clr = 1, it starts counting from 0 from th
Please answer the following question using only one 3-bit binary counter with clear input and the minimum number of components listed below, design a counter that generates the following sequence repeatedly:
0-> 3 -> 5 -> 7 -> 9 -> 11-> 13 -> 0 -> 3 -> 5 -> 7 ……
Note:
E is enable input. When E = 1, it counts at every clock cycle. When E = 0, it stops counting and output stays unchanged.
clr is clear input. When clr = 1, it starts counting from 0 from the next clock cycle if E = 1.
The allowed components are:
a) 3-bit binary counter
b) left and right shifter
c) Logic Gates (And, Or, Not)
(the number of input pins are not limited, which means that you can have more than 2 input pins)
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