(b) Draw the functional block diagram of the controller.

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(b) Draw the functional block diagram of the controller.
Transcribed Image Text:(b) Draw the functional block diagram of the controller.
Q6 Figure Q6 shows a functional block diagram of a custom processor and the Register
Transfer Level (RTL) codes to perform one of the processor operations. Assume that signal
p and q are never '1' simultaneously. The ALU operation is given in Table Q6.
SO: ()
S1: (p)
/ R1+ 2;
/ R2 + R1;
R1
R2
(p)
/ R2 + R1;
/ R1+ R1 + R2;
(pq) / R2 0;
/ R2 + 2R1;
/ R2 + R1– R2;
S2: (p)
S3: (р)
(q)
/ done = 1;
/ goto SO;
()
B
ALU_op
Figure Q6
Table Q6
ALUop [1:0]
00
01
Operation
A +B
А -В
Complement B
Pass B
10
11
Transcribed Image Text:Q6 Figure Q6 shows a functional block diagram of a custom processor and the Register Transfer Level (RTL) codes to perform one of the processor operations. Assume that signal p and q are never '1' simultaneously. The ALU operation is given in Table Q6. SO: () S1: (p) / R1+ 2; / R2 + R1; R1 R2 (p) / R2 + R1; / R1+ R1 + R2; (pq) / R2 0; / R2 + 2R1; / R2 + R1– R2; S2: (p) S3: (р) (q) / done = 1; / goto SO; () B ALU_op Figure Q6 Table Q6 ALUop [1:0] 00 01 Operation A +B А -В Complement B Pass B 10 11
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