Assume that two numbers: dividend and divisor are saved in memory address M1 and M2 respectively. Quotient and remainder should be saved in R1 and R2 respectively. Write assembly language instructions and then list microoperations for each instruction and list the control signals required to be activated for each microoperation. MBR is used as buffer for any register to register transfer operation. Signal Description: Control signals operation Comments C0 MAR to RAM (through address bus) C1 PC to MBR C2 PC to MAR C3 MBR to PC C4 MBR to IR C5 RAM to MBR C6 MBR to ALU C7 Accumulator to ALU C8 IR to MAR C9 ALU to Accumulator C10 MBR to Accumulator C11 Accumulator to MBR C12 MBR to RAM (through data bus) C13 IR to Control Unit C14 MBR to R1 C15 MBR to R2 C16 MBR to R3 C17 MBR to R4 C18 MBR to R5 C19 R1 to MBR C20 R2 to MBR C21 R3 to MBR C22 R4 to MBR C23 R5 to MBR C24 MBR to MQ C25 MQ to MBR CR Read signal: CPU to RAM CW Write Signal: CPU to RAM C-MQ-ALU MQ to ALU C-ALU-MQ ALU to MQ C-add Addition signal to ALU C-sub Subtraction signal to ALU C-or Logical OR operation to ALU C-and Logical AND operation to ALU C-mul Multiplication signal to ALU MQ must hold Multiplicand and AC must hold multiplier. After Multiplication, higher Byte will be stored in MQ and Lower Byte in AC C-div Division signal to ALU Dividend in MQ and divisor in AC. After division, Quotient in MQ and remainder in AC MBR is used as buffer for any Register to register transfer operation.
6. |
Assume that two numbers: dividend and divisor are saved in memory address M1 and M2 respectively. Quotient and remainder should be saved in R1 and R2 respectively. Write assembly language instructions and then list microoperations for each instruction and list the control signals required to be activated for each microoperation. MBR is used as buffer for any register to register transfer operation. |
|
Signal Description:
Control signals |
operation |
Comments |
C0 |
MAR to RAM (through address bus) |
|
C1 |
PC to MBR |
|
C2 |
PC to MAR |
|
C3 |
MBR to PC |
|
C4 |
MBR to IR |
|
C5 |
RAM to MBR |
|
C6 |
MBR to ALU |
|
C7 |
Accumulator to ALU |
|
C8 |
IR to MAR |
|
C9 |
ALU to Accumulator |
|
C10 |
MBR to Accumulator |
|
C11 |
Accumulator to MBR |
|
C12 |
MBR to RAM (through data bus) |
|
C13 |
IR to Control Unit |
|
C14 |
MBR to R1 |
|
C15 |
MBR to R2 |
|
C16 |
MBR to R3 |
|
C17 |
MBR to R4 |
|
C18 |
MBR to R5 |
|
C19 |
R1 to MBR |
|
C20 |
R2 to MBR |
|
C21 |
R3 to MBR |
|
C22 |
R4 to MBR |
|
C23 |
R5 to MBR |
|
C24 |
MBR to MQ |
|
C25 |
MQ to MBR |
|
CR |
Read signal: CPU to RAM |
|
CW |
Write Signal: CPU to RAM |
|
C-MQ-ALU |
MQ to ALU |
|
C-ALU-MQ |
ALU to MQ |
|
C-add |
Addition signal to ALU |
|
C-sub |
Subtraction signal to ALU |
|
C-or |
Logical OR operation to ALU |
|
C-and |
Logical AND operation to ALU |
|
C-mul |
Multiplication signal to ALU |
MQ must hold Multiplicand and AC must hold multiplier. After Multiplication, higher Byte will be stored in MQ and Lower Byte in AC |
C-div |
Division signal to ALU |
Dividend in MQ and divisor in AC. After division, Quotient in MQ and remainder in AC |
MBR is used as buffer for any Register to register transfer operation.


Trending now
This is a popular solution!
Step by step
Solved in 2 steps









