Answer the following: JO a) Given the Circuit 1 shown to the right, provide the output Q for the given inputs, assume that Q is initially 0 in each case. ко- bax ab a ON CLKO J=1 K=0 CLK=1 Creuit! J=1 K=1 CLK=0 b) A state machine that has 2 inputs, 4 outputs, and 9 states and is implemented using an "One-Hot" state assignment requires how many flip flops? ) A state machine using Circuit 1 above with inputs J and K tied together as a single input is equivalent to: D Flip-flop T Flip-lop _D Flip-flop with enable master slave S R Flip-flop -T Flip-flop with enable

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BDE
2) Answer the following:
JO
a) Given the Circuit 1 shown to the right,
provide the output Q for the given
inputs, assume that Q is initially 0 in
each case.
ко-
DaK op
I a ON
CLKO
J=1 K=0 CLK=1
J=1 K=1 CLK=D0
b) A state machine that has 2 inputs, 4 outputs, and 9 states and is implemented using an
"One-Hot" state assignment requires how many flip flops?
c) A state machine using Circuit 1 above with inputs J and K tied together as a single input
T Flip-flop
D Flip-flop with enable
master slave S R Flip-flop
is equivalent to: D Flip-flop
-
_T Flip-flop with enable
d) You wish to cause the output Q of Circuit 1 (above) to change from its current value of 1
to 0. Describe the inputs that can to cause this transition to occur (J, K, CLK).
CLK=
J=
K=
e) The you measure the clock signal for the ATMegaxYZ microcontroller and the following:
the clock is high for 100 nanoseconds (ns) and the voltage is 3.3 volts, the clock is low
for 25 na and the voltage is 0.0 volts. The rise time is 1 ns and the fall timeis 0.5 ns.
Find the clock period
where appropriate.
frequency
duty cycle
Include units
Transcribed Image Text:BDE 2) Answer the following: JO a) Given the Circuit 1 shown to the right, provide the output Q for the given inputs, assume that Q is initially 0 in each case. ко- DaK op I a ON CLKO J=1 K=0 CLK=1 J=1 K=1 CLK=D0 b) A state machine that has 2 inputs, 4 outputs, and 9 states and is implemented using an "One-Hot" state assignment requires how many flip flops? c) A state machine using Circuit 1 above with inputs J and K tied together as a single input T Flip-flop D Flip-flop with enable master slave S R Flip-flop is equivalent to: D Flip-flop - _T Flip-flop with enable d) You wish to cause the output Q of Circuit 1 (above) to change from its current value of 1 to 0. Describe the inputs that can to cause this transition to occur (J, K, CLK). CLK= J= K= e) The you measure the clock signal for the ATMegaxYZ microcontroller and the following: the clock is high for 100 nanoseconds (ns) and the voltage is 3.3 volts, the clock is low for 25 na and the voltage is 0.0 volts. The rise time is 1 ns and the fall timeis 0.5 ns. Find the clock period where appropriate. frequency duty cycle Include units
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