An annoying thing about CMOS is that it is naturally inverting so if you wanted to implement a function like Y = (A OR B) AND C. You might instead have to implement Y = NOT( (A OR B) AND C) and then tack on an inverter at the end to undo the extra NOT. Now suppose that in addition to the signals A, B and C, you also happened to have access to their inverses, (NOT A), (NOT B) and (NOT C). Show how you can use these signals in the design of a CMOS circuit that implements the original desired function, Y = (A OR B) AND C, without the extra inverter and the gate delay that it implies. Big Hint: use DeMorgan's law which is mentioned in the lecture slides. By the way can you see how DeMorgan's law helps explain how you can derive the structure of the pull-up network of a CMOS circuit from the pull-down network and vice versa. %3D
An annoying thing about CMOS is that it is naturally inverting so if you wanted to implement a function like Y = (A OR B) AND C. You might instead have to implement Y = NOT( (A OR B) AND C) and then tack on an inverter at the end to undo the extra NOT. Now suppose that in addition to the signals A, B and C, you also happened to have access to their inverses, (NOT A), (NOT B) and (NOT C). Show how you can use these signals in the design of a CMOS circuit that implements the original desired function, Y = (A OR B) AND C, without the extra inverter and the gate delay that it implies. Big Hint: use DeMorgan's law which is mentioned in the lecture slides. By the way can you see how DeMorgan's law helps explain how you can derive the structure of the pull-up network of a CMOS circuit from the pull-down network and vice versa. %3D
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Question
![An annoying thing about CMOS is that it is naturally inverting so if you wanted to
implement a function like Y = (A OR B) AND C. You might instead have to implement
Y = NOT( (A OR B) AND C) and then tack on an inverter at the end to undo the extra
NOT. Now suppose that in addition to the signals A, B and C, you also happened to
have access to their inverses, (NOT A), (NOT B) and (NOT C). Show how you can use
these signals in the design of a CMOS circuit that implements the original desired
function, Y = (A OR B) AND C, without the extra inverter and the gate delay that it
implies. Big Hint: use DeMorgan's law which is mentioned in the lecture slides. By
the way can you see how DeMorgan's law helps explain how you can derive the
structure of the pull-up network of a CMOS circuit from the pull-down network and
vice versa.
%3D](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F4ba7d472-f0f6-497e-b78b-6634291798cb%2F776a13e5-bae0-4696-916d-315c2af50c33%2F9mxkf3.png&w=3840&q=75)
Transcribed Image Text:An annoying thing about CMOS is that it is naturally inverting so if you wanted to
implement a function like Y = (A OR B) AND C. You might instead have to implement
Y = NOT( (A OR B) AND C) and then tack on an inverter at the end to undo the extra
NOT. Now suppose that in addition to the signals A, B and C, you also happened to
have access to their inverses, (NOT A), (NOT B) and (NOT C). Show how you can use
these signals in the design of a CMOS circuit that implements the original desired
function, Y = (A OR B) AND C, without the extra inverter and the gate delay that it
implies. Big Hint: use DeMorgan's law which is mentioned in the lecture slides. By
the way can you see how DeMorgan's law helps explain how you can derive the
structure of the pull-up network of a CMOS circuit from the pull-down network and
vice versa.
%3D
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