A synchronous sequential digital circuit has two inputs A and B and an output Z. The output Z is equal to 1 if, and only if, A=1 and the sequence B=101 has occurred immediately after the last time A=1, otherwise the output Z remains equal to 0. Whenever B=1, the output Z is made equal to 0, unless the condition above are satisfied. The operation of the circuit is best described by the state diagram shown in Figure 1. Input/Output = AB/Z 00/0, 01/0 00/0( 10 oo 00/0 11/0 10/0 01/0 01/0 10/0 11/0 10/0 J00/0 11/0 01/0 00/0, 0 1/0 ODoon, 1/1 Figure 1 Implement the circuit designed using positive edge-triggered T fip-flops, using the following design steps; Produce the input and output equations. Use the Gray code for state allocation, starting with 000 which represents state 1, until finally state 6 is represented by 111. Implement the circuit.

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A synchronous sequential digital circuit has two inputs A and B and an output Z. The output Z is
equal to 1 if, and only if, A=1 and the sequence B=101 has occurred immediately after the last
time A=1, otherwise the output Z remains equal to 0. Whenever B=1, the output Z is made
equal to 0, unless the condition above are satisfied. The operation of the circuit is best
described by the state diagram shown in Figure 1.
Input/Output = AB/Z
00/0, 01/00
00/0 11/0 DI/o
10/0
11/0
10/0
00/0
01/0
01/0
1/0
10/0)
11/0
-10/0
TO0/0
4
11/0
J01/0
00/0, 0 1/0,
11/1, 10/1
Doon, 10/1
Figure 1
Implement the circuit designed using positive edge-triggered T fip-filops, using the following
design steps;
Produce the input and output equations. Use the Gray code for state allocation, starting with
000 which represents state 1, until finally state 6 is represented by 111.
Implement the circuit.
Transcribed Image Text:A synchronous sequential digital circuit has two inputs A and B and an output Z. The output Z is equal to 1 if, and only if, A=1 and the sequence B=101 has occurred immediately after the last time A=1, otherwise the output Z remains equal to 0. Whenever B=1, the output Z is made equal to 0, unless the condition above are satisfied. The operation of the circuit is best described by the state diagram shown in Figure 1. Input/Output = AB/Z 00/0, 01/00 00/0 11/0 DI/o 10/0 11/0 10/0 00/0 01/0 01/0 1/0 10/0) 11/0 -10/0 TO0/0 4 11/0 J01/0 00/0, 0 1/0, 11/1, 10/1 Doon, 10/1 Figure 1 Implement the circuit designed using positive edge-triggered T fip-filops, using the following design steps; Produce the input and output equations. Use the Gray code for state allocation, starting with 000 which represents state 1, until finally state 6 is represented by 111. Implement the circuit.
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