Question 4a) Show the output waveform of a NAND gate with the inputsA, B, and C indicated in the figure below.ACb) A cache has been designed such that it has 1024 lines, witheach line or block containing 8 words. Determine the linenumber, tag, and word position for the 20-bit address3E9D216 using the direct mapping method.c) The table below represents 10 lines from a 256 line cachethat uses direct mapping with a block size of 4 words.Identify the address of the shaded data (8C16).3Line#|TagWord 00Word 01 Word 10 Word 1110110101 1234567801010154l000111 29326AD38CA2BC12EDF33001100 332CC814110011 9AD8FO Question 5Convert the IEEE Standard 754 number01101011011100101000000000000000 to its binaryequivalent.b) Determine the number of blocks of 8 words are there in a256 MB memory space and draw the logical organizationof the full address identifying the block ID portion and theword (offset) portion.Determine the number of 256 KB memories can be placed(without overlapping) in the memory space of a processorthat has 30 address lines.

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a) Show the output waveform of a NAND gate with the inputs A, B, and C indicated in the figure below. A B C

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

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