5.17 For the RTL NAND gate of Figure P5.17, find Ig In Inc and VouT for all combinations of V, and V, equal to 0 and 5 V. Use Br = 20, VE (FA) = 0.7 V. Vee(SAT) - 0.8 V, and V(SAT) = 0.2 V. %3D %3D %3!
5.17 For the RTL NAND gate of Figure P5.17, find Ig In Inc and VouT for all combinations of V, and V, equal to 0 and 5 V. Use Br = 20, VE (FA) = 0.7 V. Vee(SAT) - 0.8 V, and V(SAT) = 0.2 V. %3D %3D %3!
Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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
Transcribed Image Text:5.17 For the RTL NAND gate of Figure P5.17, find Igy
In Inc and VoLT for all combinations of V, and V.
equal to 0 and5 V. Use B, = 20, VE(FA) = 0.7 V.
Vae(SAT) = 0.8 V, and Va(SAT) - 0.2 V.
Ve = 5V
%3D
R 2kn
o Var
Va o
Q.
R
Va o
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