5. Convert the following high-level code into RISC-V assembly language. Assume that the signed integer variables g and ʼn are in registers to and t1, respectively. You can use other temporary registers like t2 and t3 if needed. a) b) if (g % 8 == 3 || g % 8 == 5) h = h 5.5; else h = h 16; if (g % 16 > 4 && g % 16 < 12) h = (g + 5 * h) % 8; else h = (q + 8.5 * h) * 9;
5. Convert the following high-level code into RISC-V assembly language. Assume that the signed integer variables g and ʼn are in registers to and t1, respectively. You can use other temporary registers like t2 and t3 if needed. a) b) if (g % 8 == 3 || g % 8 == 5) h = h 5.5; else h = h 16; if (g % 16 > 4 && g % 16 < 12) h = (g + 5 * h) % 8; else h = (q + 8.5 * h) * 9;
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
Related questions
Question

Transcribed Image Text:5.
Convert the following high-level code into RISC-V assembly language. Assume
that the signed integer variables g and ʼn are in registers to and t1, respectively. You can
use other temporary registers like t2 and t3 if needed.
a)
b)
if (g % 8 == 3 || g % 8 == 5)
h = h * 5.5;
else
h = h 16;
if (g % 16 > 4 && g % 16 < 12)
h = (g + 5 * h) % 8;
else
h = (g + 8.5 * h)
* 9;

Transcribed Image Text:4.
Convert the following high-level code into RISC-V assembly language. Assume
that the signed integer variables g and ʼn are in registers to and t1, respectively. You can
use other temporary registers like t2 and t3 if needed.
a)
b)
if (g > h)
g = (g + 7) * 2.5;
else
h = (h
if (g <= h)
g = (g
else
6)/16;
h) % 32;
g = (g + 3 * h)
* 14;
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