4.22 [5] <§4.5> Consider the fragment of LEGv8 assembly below: STUR X16, [X6, #12] LDUR X16, [X6, #8] SUB X7, X5, X4 CBZ X7, Label ADD X5, X1, X4 SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 4.22.1 [5] <§4.5> Draw a pipeline diagram to show were the code above will stall. 4.22.2 [5] <§4.5> In general, is it possible to reduce the number of stalls/NOPs resulting from this structural hazard by reordering code? 4.22.3 [5] <§4.5> Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4.22.4 [5] <§4.5> Approximately how many stalls would you expect this structural hazard to generate in a typical program?
4.22 [5] <§4.5> Consider the fragment of LEGv8 assembly below: STUR X16, [X6, #12] LDUR X16, [X6, #8] SUB X7, X5, X4 CBZ X7, Label ADD X5, X1, X4 SUB X5, X15, X4 Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a program needs to fetch an instruction during the same cycle in which another instruction accesses data. 4.22.1 [5] <§4.5> Draw a pipeline diagram to show were the code above will stall. 4.22.2 [5] <§4.5> In general, is it possible to reduce the number of stalls/NOPs resulting from this structural hazard by reordering code? 4.22.3 [5] <§4.5> Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not. 4.22.4 [5] <§4.5> Approximately how many stalls would you expect this structural hazard to generate in a typical program?
C++ for Engineers and Scientists
4th Edition
ISBN:9781133187844
Author:Bronson, Gary J.
Publisher:Bronson, Gary J.
Chapter2: Problem Solving Using C++using
Section2.3: Data Types
Problem 9E: (Practice) Although the total number of bytes varies from computer to computer, memory sizes of...
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4.22 [5] <§4.5> Consider the fragment of LEGv8 assembly below:
STUR X16, [X6, #12]LDUR X16, [X6, #8]
SUB X7, X5, X4
CBZ X7, Label
ADD X5, X1, X4
SUB X5, X15, X4
Suppose we modify the pipeline so that it has only one memory (that handles both instructions and data). In this case, there will be a structural hazard every time a
4.22.1 [5] <§4.5> Draw a pipeline diagram to show were the code above will stall.
4.22.2 [5] <§4.5> In general, is it possible to reduce the number of stalls/NOPs resulting from this structural hazard by reordering code?
4.22.3 [5] <§4.5> Must this structural hazard be handled in hardware? We have seen that data hazards can be eliminated by adding NOPs to the code. Can you do the same with this structural hazard? If so, explain how. If not, explain why not.
4.22.4 [5] <§4.5> Approximately how many stalls would you expect this structural hazard to generate in a typical program?
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