2) A computer system uses 16-bit memory addresses. It has a 2Kbyte cache organized in a direct-mapped fashion with 64 bytes per cache block. Assume that the size of each memory word is 1 byte. a) b) Determine the number of bits in each Tag, Block and Word fields of the memory address. When a program is executed, the CPU reads data sequentially from the following word addresses: 128, 144, 2176, 2180, 128, 2176 All the addresses are shown in decimal values. Assume that the cache is initially empty. For each of the six addresses, indicate whether the cache access will result in a hit or miss. Show all work. Calculate the hit rate, showing all work.

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter6: System Integration And Performance
Section: Chapter Questions
Problem 22VE
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2)
A computer system uses 16-bit memory addresses. It has a 2Kbyte cache organized in a
direct-mapped fashion with 64 bytes per cache block. Assume that the size of each
memory word is 1 byte.
a)
b)
Determine the number of bits in each Tag, Block and Word fields of the memory
address.
When a program is executed, the CPU reads data sequentially from the following
word addresses:
128, 144, 2176, 2180, 128, 2176
All the addresses are shown in decimal values. Assume that the cache is initially
empty. For each of the six addresses, indicate whether the cache access will result
in a hit or miss. Show all work.
Calculate the hit rate, showing all work.
Transcribed Image Text:2) A computer system uses 16-bit memory addresses. It has a 2Kbyte cache organized in a direct-mapped fashion with 64 bytes per cache block. Assume that the size of each memory word is 1 byte. a) b) Determine the number of bits in each Tag, Block and Word fields of the memory address. When a program is executed, the CPU reads data sequentially from the following word addresses: 128, 144, 2176, 2180, 128, 2176 All the addresses are shown in decimal values. Assume that the cache is initially empty. For each of the six addresses, indicate whether the cache access will result in a hit or miss. Show all work. Calculate the hit rate, showing all work.
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