1. Obtain the state table, state diagram, and functions of the following sequential design. Implement the design and verify the state table. Use a 4-bit Shift Register to store and display the result of CI 0011 +0001 0100 Full Adder Hand-In • State table o State diagram D CH1 CLK Functions of sum and carry • Screenshot of the complete circuit with the results of 0011 +0001 (stored in the 4-bit Shift Register with MSB and LSB indicated)

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