1. Assuming the full adder drives a load L=1.5, determine the critical path and its corresponding delay. 2. Using this full adder to create an 8-bit ripple carry adder, what is the critical path delay of this 8-bit adder? (Assume unconnected ports are driving L=1.5 load)

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1. Assuming the full adder drives a load L=1.5, determine the critical path and its corresponding delay.
2. Using this full adder to create an 8-bit ripple carry adder, what is the critical path delay of this 8-bit adder? (Assume unconnected ports are driving L=1.5 load)

Cout
A B
B
D
Sum
The table below shows the delay of the gates
GATE
AND2
XOR2
OR2
Cin
tpLH (ns)
0.15 + 0.037L
0.15 + 0.038L
0.12 + 0.037L
Assume each gate presents a load L=1.
tpHL (ns)
0.16+ 0.017L
0.16+ 0.025L
0.2 + 0.019L
Transcribed Image Text:Cout A B B D Sum The table below shows the delay of the gates GATE AND2 XOR2 OR2 Cin tpLH (ns) 0.15 + 0.037L 0.15 + 0.038L 0.12 + 0.037L Assume each gate presents a load L=1. tpHL (ns) 0.16+ 0.017L 0.16+ 0.025L 0.2 + 0.019L
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