2. What is the duration of bus cycle in 8086 MPU if the clock is 20 MHz and two wait states are inserted? a- 50 nsec b- 200nsec c- 250nsec d- 300nsec
2. What is the duration of bus cycle in 8086 MPU if the clock is 20 MHz and two wait states are inserted? a- 50 nsec b- 200nsec c- 250nsec d- 300nsec
Introductory Circuit Analysis (13th Edition)
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Author:Robert L. Boylestad
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
Transcribed Image Text:Q.4: Choose the right answer for the following:
2. What is the duration of bus cycle in 8086 MPU if the clock is 20 MHz and two wait
states are inserted?
a- 50 nsec b-200nsec c-250nsec d- 300nsec
3. If READY pin is grounded, it will introduce -----state into the bus cycle of the 8086
MP.
c- wait
a- high
4. The 74ALS138 has total of ---- outputs.
a- four b- 16 c- ten d-8
5. When A0-0, it makes the address an -
b- no
d- low
address.
a- I/O
b- even
c- odd d- extra
6. If the oscillation frequency of 8284A clock generator is 24 MHz, the clock signal
frequency is----- a-4 MHz b- 20 MHz c-8 MHz d- 6 MHz
7. If the oscillation frequency of 8284A clock gererator is 24 MHz, the peripheral
frequency is------ a-4 MHz b- 20 MHz c- 8 MHz d- 6 MHz
8. In fully buffered 8086 microprocessor, its address p ns are already buffered by...
a- two 74LS373 address latches
b- hree 74LS245 address latches
c- three 74LS373 address latches
9. The RES input to the 8284A is placed at logic -- lev l in order to reset the 8086.
d- two '4LS245 transceiver
а- 00 b-01 с-10
d- 11
10. If I/O port address in PPI 82C55 by using a 74AL 138 ( to generate high-bank I/O
address) is 1DH, then it used to address:
а- РPI5, РB b- PPI7,PB с- РPI5,РС d-PPI7,P
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