1. The de supply voltage for TTL is typically +5 V. 2. The fan-out of a logic gate is the number of gates in an IC package. 3. CMOS uses MOSFETS. 4. BJT stands for binary junction transistor. 5. An open-collector gate must be connected to an external resistor.
1. The de supply voltage for TTL is typically +5 V. 2. The fan-out of a logic gate is the number of gates in an IC package. 3. CMOS uses MOSFETS. 4. BJT stands for binary junction transistor. 5. An open-collector gate must be connected to an external resistor.
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![TRUE/FALSE QUIZ
1. The de supply voltage for TTL is typically +5 V.
2. The fan-out of a logic gate is the number of gates in an IC package.
3. CMOS uses MOSFETS.
4. BJT stands for binary junction transistor.
5. An open-collector gate must be connected to an external resistor.
6. CMOS is the dominant digital IC technology.
7. A totem-pole output means that two or more resistors are in series.
8. CMOS is subject to ESD.
9. A tri-state output can be HIGH, LOW or high-impedance.
10. Propagation delay is a measure of the speed of a logic gate.](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F71dc10a0-8c6e-4949-929b-e1fcfeb7145a%2F12210038-3355-457f-b0aa-f5b4dc8399d0%2F6hmloiq_processed.jpg&w=3840&q=75)
Transcribed Image Text:TRUE/FALSE QUIZ
1. The de supply voltage for TTL is typically +5 V.
2. The fan-out of a logic gate is the number of gates in an IC package.
3. CMOS uses MOSFETS.
4. BJT stands for binary junction transistor.
5. An open-collector gate must be connected to an external resistor.
6. CMOS is the dominant digital IC technology.
7. A totem-pole output means that two or more resistors are in series.
8. CMOS is subject to ESD.
9. A tri-state output can be HIGH, LOW or high-impedance.
10. Propagation delay is a measure of the speed of a logic gate.
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