1. (10 points) A 6-bit right-shift register, along with some additional logic, detects whether the 6-bit number in the register is a multiple of 5, or the register contains all zeroes. The input to the most significant bit (msb) of the shift register is the least significant bit (lsb) output of the shift register, inverted. (i.e., there is a feedback path with an inverter from the lsb output to the msb input). a) Draw this circuit, with the minimum logic required. The only input to the circuit should be CLK. The only output of the circuit should be M5orZ, which indicates a multiple of 5 or all zeroes detected. M5orZ should be 1 when true. Use edge-triggered D flip-flops to form the shift register. The D flip- flops should only have a Q output, no Q output. For the additional logic, you can use AND, OR, NOT, NAND and NOR, with as many inputs as needed per gate.
1. (10 points) A 6-bit right-shift register, along with some additional logic, detects whether the 6-bit number in the register is a multiple of 5, or the register contains all zeroes. The input to the most significant bit (msb) of the shift register is the least significant bit (lsb) output of the shift register, inverted. (i.e., there is a feedback path with an inverter from the lsb output to the msb input). a) Draw this circuit, with the minimum logic required. The only input to the circuit should be CLK. The only output of the circuit should be M5orZ, which indicates a multiple of 5 or all zeroes detected. M5orZ should be 1 when true. Use edge-triggered D flip-flops to form the shift register. The D flip- flops should only have a Q output, no Q output. For the additional logic, you can use AND, OR, NOT, NAND and NOR, with as many inputs as needed per gate.
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Transcribed Image Text:1. (10 points) A 6-bit right-shift register, along with some additional logic, detects whether the 6-bit
number in the register is a multiple of 5, or the register contains all zeroes. The input to the most
significant bit (msb) of the shift register is the least significant bit (lsb) output of the shift register,
inverted. (i.e., there is a feedback path with an inverter from the lsb output to the msb input).
a) Draw this circuit, with the minimum logic required. The only input to the circuit should be CLK. The
only output of the circuit should be M5orZ, which indicates a multiple of 5 or all zeroes detected.
M5orZ should be 1 when true. Use edge-triggered D flip-flops to form the shift register. The D flip-
flops should only have a Q output, no Q output. For the additional logic, you can use AND, OR, NOT,
NAND and NOR, with as many inputs as needed per gate.
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