For the serial in/serial out shift register (4 stage), determine the data-output waveform for the data-input and clock waveforms in Figure 5. Assume that the register is initially cleared. CLK Serial data in Serial data in SRG 10 Serial data out CLK Figure 5: Shift register with input waveforms (b) Design a 4-bit Johnson counter and draw its timing sequence (output at every stage) for 12 clock cycles. Assume clock frequency is 10 kHz.

Question 2 Given Vcc=12V, at first the voltage inputs at Pin 6 and Pin 2 are both 10V. Decide the output state at Pin 3 after the voltage inputs at Pin 6 and Pin 2 drop to 6V. VCC CONTROL RESET DISCHARGE O VOLTAGE 8 COMPARATORS DISCHARGE TRANSISTOR THRESHOLD Q VOLTAGE I DIVIDER I OUTPUT OUT TRIGGER OUTPUT FLIP-FLOP GND

1. Consider the CRC generator shown below. Determine the output of the CRC circuit (i.e. Q4 Q3 Q2 Q1 Q0, expressed as a decimal number) for the input sequence "1010" (input one bit at a time, left to right). Assume the CRC circuit is initialized to state 11111. D Q0 Q2 Q4 Q1 Q3 Clock - Data In

A multiplexer has 3 select lines and two enables. How many other inputs are there? How many TOTAL inputs are there? How many output/outputs are there? Draw a block diagram of this multiplexer.

H.W :- 1) A four logic-signal A,B,C,D are being used to represent a 4-bit binary number with A as the LSB and D as the MSB. The binary inputs are fed to a logic circuit that produces a logic 1 (HIGH) output only when the binary number is greater than 01102-610. Design this circuit. 2) repeat problem 1 for the output will be 0 (LOW) when the binary input is less than 01112-710- Saleem Lateef

4. The following Data input and data select waveforms are applied to a Multiplexer. Determine the output waveform. Do D Dy So

What is the function of the A, B, and D registers of the CPU12?

Design and draw a 3 bit Gray code synchronous counter with the state diagram shown below [14 marks] State diagram for a 3-bit Gray code counter

1-With most monostable multivibrators, what is the Q output when no input trigger has 2- The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out Q5A: - Choose the correct answer for each question occurrèd? A. LOW, B. +5V, C. SET, D.HIGH shift register that is initially clear. What are the O outputs after four clock pulses? A. 10011100 В. 11000000 C. 00001100 D. 11110000 S-11 an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse? A. 11101011 В. 00010111 С. 11110000 D. 00000000 4- A 555 timer in monostable application mode can be used for A. Pulse position modulation B. Frequency shift keying C. Speed control and measurement. D. Digital phase detector.

2-A) What's the name of the opamp circuit below? Briefly explain the logic. 2-B) Why is there a DC 1 volt offset in Vs sine signal?