Prelab 4 Law (1)

Modify this circuit to extend the upper frequency limit to greater than 15 MHz. You may change the topology (i.e. configuration), but not the power supply voltage or collector bias current. The circuit voltage gain must be 46dB +/- 1 dB. Provide simulation results to show AC frequency responses of both circuits on the same plot, and annotate the 3dB upper frequency limit on both traces. Use typical ẞ values from the data sheet for the simulation. You may assume that 1% resistors are available in values below 100. The circuit must adhere to Standard Bias techniques. V4 Rser=0 SINE(0 0.02 10k) AC 1 VCC ୯ V2 +15V Cin1 1μ -VCC VCC R4 Rc1 147k 7k Q3 2N3904 R7 R6 9.09 20.5k Ce1 Re1 1.00k 10p Out

ideally, what should the reactance of a bypass capacitor be in order to eliminate a 10 kHz AC voltage at a given point in an amplifier circuit?

If the maximum frequency deviation is 25kHz and modulating signal frequency is 12kHz.     6c.    Is this FM treated as narrow band or wide band?

A product detector has a 27-MHz carrier and is used to pass audio frequencies from 200-Hz to 15-KHz range. What is the approximate center frequency of the filter needed to pass the lower sideband is used?

d) A regulator as shown in Figure 4 has an input voltage, Vs 12 V. The duty cycle, k = 0.35 and the switching frequency is 30 kHz. It also has an inductance, L= 200 µH, filter capacitance, C = 440 µF. The average load current, la = 1.25 A. Determine the; i. average output voltage, Va. ii. peak-to-peak output ripple voltage, AVc. iii. peak-to-peak output ripple current of inductor, AI. iv. peak current of the transistor, Ip. v. critical values of L and C. vi. critical values of L and C if Vs is increased to 14 V. Estimate the change in percentage for the critical values of L and C. V, Load V V G Figure 4