CT212_AbrahamW2Lab

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Electrical Engineering

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Feb 20, 2024

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Name: Shekita Abraham GID: G00218493 Lab 2: Logic Gates Grantham University Date: 11/21/2023
Introduction: This week's lab will take what we have learned about logic gates and apply them to circuits in the Multisim application. As we learned all combinations, logic gates can be reduced down to basic AND, OR, and NOT logic operations and the AND gate, OR gate, and inverter that implement them. This lab experiment will demonstrate how to analyze the operation of logic gates and verify their operation. In part one we will use Multisim to verify the operation of the AND gate, OR gate, and invertor. In part two, we will use Multisim logic converter to examine the operation of the NAND, NOR, and XOR gates. Equipment/Components: This lab used resistors, probes, logic analyzer, switches, and power sources. Two power sources were used in this lab, SPST and DGND. A and B were used to open and close the circuits. Procedure: Follow the instructions on the lab sheet to determine the input and outputs of the logic gates and the extended logic gates. Circuit design: Part 1a Completed Test Circuit Part 1b OR Gate
Part 1c The Inverter Part 2a The NAND Gate
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Part 2b The NOR Gate Part 2c The XOR Gate
Execution/Results: Part 1a Both circuits closed
Part 1a Switch A closed and Switch B open Part 1a Switch A open and Switch B closed Part 1a Switch A and B Open
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Part 1a Chart Switch A Closed=0 Open=1 Switch B Closed=0 Open=1 Output Not Lit=0 Lit=1 0 0 0 0 1 0 1 0 0 1 1 1 Part 1b Both circuits open
Switch A open and Switch B closed
Switch A closed and Switch B open Both circuits closed
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Chart Switch A Closed=0 Open=1 Switch B Closed=0 Open=1 Output Not Lit=0 Lit=1 0 0 0 0 1 1 1 0 1 1 1 1 Part 1c Switch A closed
Switch A open
Chart Switch A Closed=0 Open=1 Output Not Lit=0 Lit=1 0 1 1 0 Part 2a
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Chart A B Output 0 0 1 0 1 1 1 0 1 1 1 0 Part 2b
Chart A B Output 0 0 1 0 1 0 1 0 0 1 1 0 Part 2c
Chart A B Output 0 0 0 0 1 1 1 0 1 1 1 0 Analysis: Questions for Part 1 1) Which gate follows the rule “Any 1 gives a 1”? OR Gate 2) Which gate follows the rule “Any 0 gives a 0”? And Gate 3) Explain why the inverter is so-named. There is only one input with the inverter, so the inverter inverts the input into the given output. Questions for Part 2 1) How does the truth table of the NAND gate compare with the truth table of the AND gate? The outputs are the opposite.
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2) You observe that the output of an unknown 2-input gate is 0 only when the inputs are both 0 or both inputs are 1. What type of logic gate are you observing? XOR Gate 3) What gate follows the rule “Any 1 gives a 0”? NOR Gate 4) An XOR gate is similar to an OR gate in that the output is 1 when either input is 1. How does XOR gate differ from an OR gate? The XOR gate will have an output of 0 when both inputs are 1. Analyze the results obtained from Multisim/VHDL and compare those to your calculated results (if applicable). The simulation was correct and easy. I faced issues because there was an error in the instructions but once the instructions were corrected, getting the lab done was simple. Conclusion: This week's lab gave us a chance to see how to use digital circuits that can be built and used to calculate different logic gates. In the basic logic gates, we were able to use switches and a lighted probe to input different readings based on open and closed switches and then observe if the probe was lit or not. With the extended logic gates, we were able to connect a logic converter straight to the circuit and use the conversion tab to get a table reading based on the inputs.