Prb2_Sp2024

docx

School

Johns Hopkins University *

*We aren’t endorsed by this school

Course

605.611

Subject

Computer Science

Date

Feb 20, 2024

Type

docx

Pages

Uploaded by ChiefFlower13314

Computer Science 605.611 Problem Set 2 (Appendix A of the textbook defines and describes all MIPS instructions. Instructions not identified as pseudo-instructions in appendix A are true-op instructions. To demonstrate your understanding of the concepts, your answers on problem sets should be produced manually without the use of a simulator or other outside source.) 1. Recall that “ true-op” instructions are those that can be translated by the assembler into a single 32-bit built-in machine instruction. True-op instructions can only use addressing modes that are supported by the built-in machine instructions and cannot use immediate operands outside the range -32768 to +32767. a) (3) The goal of the instruction sequence below is to place the sum of $t0 plus the decimal constant +350000 into register $t0. Write in the missing decimal immediate operands required to accomplish the goal. Use only immediate operands that are allowed in true-op instructions. lui $1,_____ ori $1, $1, _____ addu $t0, $t0, $1 b) (3) The goal of the instruction sequence below is to place the sum of $t0 plus the decimal constant -350000 into register $t0. Write in the missing decimal immediate operands required to accomplish the goal. Use only immediate operands that are allowed in true-op instructions. lui $1, ____ ori $1, $1, _____ addu $t0, $t0, $1 c) (3) The goal of the instruction sequence below is to place the sum of $t0 plus the decimal constant -32876 to register $t0. Write in the missing decimal immediate operands required to accomplish the goal. Use only immediate operands that are allowed in true-op instructions. lui $1, _____ ori $1, $1, ______ addu $t0, $t0, $1 d) (3) The goal of the instruction sequence below is to place the sum of $t0 plus the decimal constant +32768 to register $t0. Write in the missing decimal immediate operands required to accomplish the goal. Use only immediate operands that are allowed in true-op instructions. ori $1, $0, _____ addu $t0, $t0, $1

2. For each of the decimal integers listed below, what is the minimum number of bits required to represent that integer in two’s complement form if only one sign bit is included? a) (3) 30800 b) (3) -32768 c) (3) -6 d) (3) 32768 3.(5) A system uses 16 bits to represent signed integers in excess-4000 form (i.e., the bias is 4000). Fill in the blanks to show the range of signed integers that can be represented in this excess-4000 system. The range is __________ to _________. 4. (5) Based the instruction mnemonic (i.e., its name) and on the instruction’s operands, indicate whether each of the following instructions is a true-op instruction or a pseudo-instruction. li $4, -72 lui $5, 0x8000 addiu $,3, $9, 51902 ori $7, $0, 0xCABE andi $11, $6, -13634

5. Assume that floating point register $f8 contains the 32-bit floating point representation of the value -2.5. CPU register $4 contains the 32-bit two’s complement representation of 30. Registers $f8 and $4 are set to these patterns prior to executing each of the instruction sequences listed below. a) (5) The following pair of instructions places a 32-bit pattern into register $2. What decimal integer has the resulting pattern as its two’s complement representation? mfc1 $2, $f8 addu $2, $2, $4 b) (5) The following pair of instructions places a 32-bit pattern into register $2. What decimal integer has the resulting pattern as its two’s complement representation? mtc1 $4, $f8 xor $2, $4, $0 c) (5) The following instruction sequence places a 32-bit pattern into register $2. What decimal integer has the resulting pattern as its two’s complement representation? cvt.w.s $f6, $f8 mfc1 $2, $f6 xor $2, $4, $2 6. (5) Floating point register $f8 contains the 32-bit floating point representation of -8761. The following instruction is then executed: cvt.s.w $f6,$f8 Use eight hex digits to show the resulting bit pattern contained in $f6. $f6 = 0x_______________ 7. (5) If each character is encoded as an 8-bit ASCII character, a 32-bit register can contain 4 characters. Assume that register $3 contains the two’s complement representation of +1094861636 and register $4 contains the two’s complement representation of +538976288. After the instruction addu $2,$3,$4 is executed, show the 4 ASCII characters represented by the 32-bit pattern produced in register $2. Display the ASCII characters (not their 8-bit codes) from left to right (i.e., from the high byte to the low byte within the register).

Your preview ends here

Eager to read complete document? Join bartleby learn and gain access to the full version

Access to all documents
Unlimited textbook solutions
24/7 expert homework help

8. Since the MIPS processor uses 32-bit addresses, it can reference any location within the 4-GB address space. The bytes in memory are numbered consecutively starting from 0x00000000 at the low end of memory up to 0xFFFFFFFF at the upper end of memory. a) (5) The jump instruction j loop transfers control to the instruction to which the label “loop” is attached (i.e., it jumps to loop). Assume that the machine code for this jump instruction is located at memory address 0x20CE88C0 and that the label “loop” corresponds to memory address 0x2C4E088C. What is the 32-bit machine code for this jump instruction? Express your answer as an 8-digit hex number. The jump instruction is described in modules 1 and 2 as well as in appendix A of the textbook. b) (5) The conditional branch instruction beq $0, $0, exit always transfers control to the instruction to which the label “exit” is attached (since it compares register $0 with itself). Assume that the branch instruction is located at memory address 0x20CE68C0 and the label “exit” corresponds to memory address 0x20CE88C4. What is the 32-bit machine code for this beq instruction? Express your answer as an 8-digit hex number. The beq instruction is described in modules 1 and 2 as well as in appendix A of the textbook. c) (5) A jump instruction transfers control to some 32-bit memory address within the instruction memory. Assume that the 32-bit machine instruction at that address is 0x00000000. This target instruction (0x00000000) is an R-type instruction. Indicate the ALU operation performed by this R-type instruction and indicate the value contained in the result register. 9. Assume that CPU register $11 is refilled with the pattern 0xCAFEF00D prior to executing each of the instructions listed below. Use 8 hex digits to show the contents of $11 after each instruction is executed. a) (3) addiu $11, $11, -2 contents of $11 = 0x____________ b) (3) addi $11, $11, -2 contents of $11 = 0x____________ c) (3) ori $11, $11, -2 contents of $11 = 0x____________ d) (3) xori $11, $11, -2 contents of $11 = 0x____________ e) (3) andi $11, $11, -2 contents of $11 = 0x____________ f) (3) sra $11, $11, 6 contents of $11 = 0x____________

10. (3) Assume that register $15 contains some signed integer value N (in two’s complement form). Write down a single MIPS true-op instruction (not a pseudo-instruction) that places the two’s complement representation of -N into register $16. That is, the negative of the integer value in $15 is placed into $16. 11. (5) Based on Booth’s algorithm, how many additions and how many subtractions should be performed in multiplying the decimal integer 9040 by the decimal multiplier -592 .

Related Documents

INT220 Milestone Two.docx

assigment4.docx

Game.java

Prb4_Sp2024.docx

Online Survey Software _ Qualtrics Survey Solutions.pdf

Prb3_Sp2024-1.docx

4.2 - Troubleshoot IP Configuration Issues.docx

4.1 - IP Addressing.docx

4.2.6 - Troubleshoot IP Configuration 2.pdf

hw3.pdf

hw4_440.docx

mahesh20_hw4.pdf

Recommended textbooks for you

C++ for Engineers and Scientists

Computer Science

ISBN:9781133187844

Author:Bronson, Gary J.

Publisher:Course Technology Ptr

C++ Programming: From Problem Analysis to Program...

Computer Science

ISBN:9781337102087

Author:D. S. Malik

Publisher:Cengage Learning

Systems Architecture

Computer Science

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Cengage Learning

Microsoft Visual C#

Computer Science

ISBN:9781337102100

Author:Joyce, Farrell.

Publisher:Cengage Learning,

COMPREHENSIVE MICROSOFT OFFICE 365 EXCE

Computer Science

ISBN:9780357392676

Author:FREUND, Steven

Publisher:CENGAGE L

Programming Logic & Design Comprehensive

Computer Science

ISBN:9781337669405

Author:FARRELL

Publisher:Cengage

SEE MORE TEXTBOOKS

Recommended textbooks for you

C++ for Engineers and Scientists
Computer Science
ISBN:9781133187844
Author:Bronson, Gary J.
Publisher:Course Technology Ptr
C++ Programming: From Problem Analysis to Program...
Computer Science
ISBN:9781337102087
Author:D. S. Malik
Publisher:Cengage Learning
Systems Architecture
Computer Science
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Cengage Learning
Microsoft Visual C#
Computer Science
ISBN:9781337102100
Author:Joyce, Farrell.
Publisher:Cengage Learning,
COMPREHENSIVE MICROSOFT OFFICE 365 EXCE
Computer Science
ISBN:9780357392676
Author:FREUND, Steven
Publisher:CENGAGE L
Programming Logic & Design Comprehensive
Computer Science
ISBN:9781337669405
Author:FARRELL
Publisher:Cengage