Prb3_Sp2024-1

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Feb 20, 2024

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Computer Science 605.611 Problem Set 3 Module 3 defines and describes basic logic gates such as AND, OR, XOR, NOT, etc. 1. The following truth table defines the output C as a function of the two inputs A and B: a) (5) Write down the expression for the logical product of the zero maxterms. Maxterms were defined in module 3. b) (5) Use only Boolean identities (not truth tables) to show that the logical sum of the non-zero minterms for this function is equivalent to the logical product of the zero maxterms. Minterms and maxterms were defined in module 3. 2. (5) Which one of the following individual logic gates is equivalent to the circuit shown below? That is, given the same two single-bit data inputs A and B, which one of the 6 logic gates listed below generates the same output as the circuit? a) AND d) NAND b) OR e) XNOR c) NOR f) XOR

3 a) (5) Show how the following 3-input NOR gate can be implemented using a minimum number of 2-input NOR gates. Only NOR gates should be included in your solution. b) (5) Show how the following 3-input AND gate can be implemented using a minimum number of 2-input AND gates. Only AND gates should be included in your solution. 4. (5) The output generated by the logic circuit shown below corresponds to a logic expression containing a single term . Write down that simplified logic expression. Output = ____________

5. a) (5) Multiplication and division can be implemented using three simpler ALU operations. What are those three operations? b) (5) Write down one or more MIPS true-op instructions that will place the arithmetic difference $4 - $5 into register $6. Your solution should not use any type of subtract instruction and should modify no register other than $6. 6. a) (5) Is the circuit shown below a combinational circuit or is it a sequential circuit? Explain your answer. b) (5) Assume that each gate in the circuit show above in part a) takes 1 ns to produce the result on its output line in response to a 0 or a 1 on its input line. That is, the propagation delay for each gate is 1 ns. Output is 0 at time 0. At time 0, input is 0 and remains 0 until it is set to 1 at time 8 ns and remains 1 until it is set to 0 at time 10 ns. Complete the table by filling in the values for output produced by the circuit at the times shown in the table. Time Input Output 0 0 0 4 0 8 1 10 0 12 0

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7. (5) The truth table on the left below corresponds to a half adder where A and B are the two input data bits, X is the sum and Y is the carry. Complete the truth table on the right by filling in the entries to make the table correspond instead to a half subtractor. For the half subtractor, X is the difference (A - B) and Y is the borrow. A B X Y A B X Y 0 0 0 0 0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 1 0 1 1 1 8. (5) Is the circuit shown below an example of a decoder, an encoder or a multiplexer? Explain how the output Y is related to the inputs.

9. Consider the following circuit: a) (5) Is this a combinational circuit or is it a sequential circuit? Explain your answer. b) (5) If S=0, show the value for each of the 4 outputs if initially I 3 , I 2 , I 1 I 0 = 1111. O 3 = ______ O 2 = _______ O 1 = ______ O 0 = _______ c) (5) If S=1, show the value for each of the 4 outputs if initially I 3 , I 2 , I 1 I 0 = 1011. O 3 = _______ O 2 = ________ O 1 = ________ O 0 = ________

10. (5) Is the circuit shown below an example of a decoder, an encoder or a multiplexer? Explain how the outputs are related to the inputs. 11. (5) Is the circuit shown below an example of a decoder, an encoder or a multiplexer? Explain how the outputs are related to the inputs.

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12. (5) Consider the logic circuit shown below: Which one of the following individual logic gates is equivalent to this circuit? That is, which one of the 6 logic gates listed below generates the same output as the circuit above with A and B as its two inputs? a) AND d) NAND b) OR e) XNOR c) NOR f) XOR 13. (5) Write down a single MIPS instruction to place into register $7, the quotient of the signed integer in register $4 divided by the constant 256. Your solution should not use any of the MIPS division instructions. 14. (5) Let b31, b30, b29, . . . b1, b0 correspond to the 32 bits within a CPU register. The unsigned integer represented by this 32-bit pattern corresponds to the following polynomial in powers of two: P_unsigned = b31*(2^31) + b30*(2^30) + b29*(2^29) + . . . + b1*(2^1) + b0*(2^0) where, of course, each bn is either 0 or 1 The two’s complement signed integer represented by the 32-bit pattern corresponds to the following polynomial in powers of two where the leftmost bit (b31) is multiplied by –(2^31): P_signed = b31*[-(2^31)] + b30*(2^30) + b29*(2^29) + . . . + b1*(2^1) + b0*(2^0) Evaluate P_unsigned and P_signed for the 32-bit pattern: 11000000000000110100001000111010 and express your answers in decimal. P_unsigned = ________________ P_signed = _________________

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