
Essentials of Computer Organization and Architecture
5th Edition
ISBN: 9781284123036
Author: Linda Null
Publisher: Jones & Bartlett Learning
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Chapter 6, Problem 13E
a)
Explanation of Solution
In direct mapped cache the address of the main memory is being subdivided into 3 parts and they are:
- Tag
- Block
- Word.
Given:
Byte addressable memory=
Number of blocks present in the cache is 8 and it is equivalent to
It requires 3 bits for a block field
b)
Explanation of Solution
Calculating the hit ratio:
- The first address is 0=(000000000000000)2and is considered to be a miss.
- Thus the blocks containing in this address is moved to the cache.
- The block that is moved to the cache is from 010 to 710.
- According to the bit size of the block field (000)2 is equivalent to 0 and it is being moved to the block 0.
- All the bytes are now moved to the block 0.
- The above mentioned process of actions will be continued repeatedly until the address 6310
- The process will be continued in such a way for every miss there would be 7 hits because the starting block is considered to be as miss.
- After continuing this process, the cache will be found to be full at this stage.
- Therefore, there will be 8 misses and 56 hits.
- At the address is 6410=(000000001000000)2and is considered to be a miss.
- Thus the blocks containing 8 bytes are moved to the main memory.
- The block 010 to 710 that resides in the main memory is now being replaced to be 6410 to 6710
- Therefore, there will be 1 miss and 3 hits.
- At the end of first loop there will be 9 miss and 59 hits.
- The above mentioned process will be repeated again and again for the remaining loops.
- The block that resides in the memory will be again gets replaced.
- Thus 7 hits will be followed for the bytes that remain in the block.
- For the remaining bytes till 6310 it will be all hit.
- There will be 1miss followed by 63 hits which are followed by 1 miss and 3 hits.
- Therefore, in total there will be 2 misses and 66 hits in the second iteration.
- The process will be repeated for the next third and fourth loop...
c)
Explanation of Solution
Effective Access time (EAT):
- EAT is a measure of Hierarchal memory performance.
- A weighted average that utilizes the hit ratio and the relative access time of the levels present in successful order of the memory hierarchy is called as effective access time.
Formula for the effective access time:
The formula for effective access time where the memory contains two levels that includes a main memory and the cache memory is obtained as shown below:
In the above formula,
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Chapter 6 Solutions
Essentials of Computer Organization and Architecture
Ch. 6 - Prob. 1RETCCh. 6 - Prob. 2RETCCh. 6 - Prob. 3RETCCh. 6 - Prob. 4RETCCh. 6 - Prob. 5RETCCh. 6 - Prob. 6RETCCh. 6 - Prob. 7RETCCh. 6 - Prob. 8RETCCh. 6 - Prob. 9RETCCh. 6 - Prob. 10RETC
Ch. 6 - Prob. 11RETCCh. 6 - Prob. 12RETCCh. 6 - Prob. 13RETCCh. 6 - Prob. 14RETCCh. 6 - Prob. 15RETCCh. 6 - Prob. 16RETCCh. 6 - Prob. 17RETCCh. 6 - Prob. 18RETCCh. 6 - Prob. 19RETCCh. 6 - Prob. 20RETCCh. 6 - Prob. 21RETCCh. 6 - Prob. 22RETCCh. 6 - Prob. 23RETCCh. 6 - Prob. 24RETCCh. 6 - Prob. 25RETCCh. 6 - Prob. 26RETCCh. 6 - Prob. 27RETCCh. 6 - Prob. 28RETCCh. 6 - Prob. 29RETCCh. 6 - Prob. 30RETCCh. 6 - Prob. 31RETCCh. 6 - Prob. 32RETCCh. 6 - Prob. 33RETCCh. 6 - Prob. 34RETCCh. 6 - Prob. 35RETCCh. 6 - Prob. 36RETCCh. 6 - Prob. 37RETCCh. 6 - Prob. 38RETCCh. 6 - Prob. 39RETCCh. 6 - Prob. 1ECh. 6 - Prob. 2ECh. 6 - Prob. 3ECh. 6 - Prob. 4ECh. 6 - Prob. 5ECh. 6 - Prob. 6ECh. 6 - Prob. 7ECh. 6 - Prob. 8ECh. 6 - Prob. 9ECh. 6 - Prob. 10ECh. 6 - Prob. 11ECh. 6 - Prob. 12ECh. 6 - Prob. 13ECh. 6 - Prob. 14ECh. 6 - Prob. 15ECh. 6 - Prob. 16ECh. 6 - Prob. 17ECh. 6 - Prob. 18ECh. 6 - Prob. 19ECh. 6 - Prob. 20ECh. 6 - Prob. 21ECh. 6 - Prob. 22ECh. 6 - Prob. 23ECh. 6 - Prob. 24ECh. 6 - Prob. 25ECh. 6 - Prob. 26ECh. 6 - Prob. 27ECh. 6 - Prob. 28ECh. 6 - Prob. 29E
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