EBK ESSENTIALS OF MIS,
EBK ESSENTIALS OF MIS,
13th Edition
ISBN: 8220106778494
Author: LAUDON
Publisher: PEARSON
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Chapter 4, Problem 8HMP

Explanation of Solution

Privacy issues of data brokers such as InfoFree:

The data brokers such as InfoFree raise privacy issues because of the following reasons:

  • Numerous reason for which data brokers collect and use data pose threats to consumers, such as unpredicted uses of their data.
  • Some data brokers store data about consumers indeterminately, which may build a security threats.
  • Information provided may also use by the prisoners for recognize robbery and so on...

Explanation of Solution

Limitations on access to preserve user privacy:

If a person’s name and other personal information were is in such database, to preserve one’s privacy, one would need the following restrictions on access to the data.

  • Control the access of such information stored in the database without the knowledge of the consumer.
  • Control the access and trade of such information stored in the database, for the causes of insurance, employment and so on...

Explanation of Solution

Based on the following data users such as government agencies, employer, private business firms and other individuals, the necessity in terms of privacy and access to data broker information may differ.

  • Government agencies would absolutely like information about their residents for policy resolutions...

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Q.1. Architecture performance [10 marks] Answer A certain microprocessor requires either 2, 4, or 6 machine cycles to perform various operations. ⚫ (40+g+f)% require 2 machine cycles, ⚫ (30-g) % require 4 machine cycles, and ⚫ (30-f)% require 6 machine cycles. (a) What is the average number of machine cycles per instruction for this microprocessor? Answer (b) What is the clock rate (machine cycles per second) required for this microprocessor to be a "1000 MIPS" processor? Answer (c) Suppose that 35% of the instructions require retrieving an operand from memory which needs an extra 8 machine cycles. What is the average number of machine cycles per instruction, including the instructions that fetch operands from memory?
Q.2. Architecture performance [25 marks] Consider two different implementations, M1 and M2, of the same instruction set. M1 has a clock rate of 2 GHz and M2 has a clock rate of 3.3 GHz. There are two classes of instructions with the following CPIs: Class A CPI for M1 CPI for M2 2.f 1.g B 5 3 C 6 4 Note that the dots in 2 fand 1.g indicate decimal points and not multiplication. a) What are the peak MIPS performances for both machines? b) Which implementation is faster, if half the instructions executed in a certain program are from class A, while the rest are divided equally among classes B and C. c) What speedup factor for the execution of class-A instructions would lead to 20% overall speedup? d) What is the maximum possible speedup that can be achieved by only improving the execution of class-A instructions? Explain why. e) What is the clock rate required for microprocessor M1 to be a "1000 MIPS" (not peak MIPS) processor?
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