COMPUTER SCIENCE ILLUMIN.-TEXT
7th Edition
ISBN: 9781284156010
Author: Dale
Publisher: Jones & Barlett
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Chapter 4, Problem 72E
Explanation of Solution
Circuit diagram for combining the two full adders and its equivalent truth table
Full adder:
- The full adder is an electric circuit which is used to perform the addition of three binary digits.
- It takes the inputs of two binary digits and another input is the carry-in value.
- It produces the output as sum and carry-out.
- Logic diagram for the full adder takes three inputs A, B, and Carry-in and produces the output Sum and Carry-out.
Circuit diagram for combining the two full adders:
- The first full adder takes the input as B, D, Carry-in (assume 0) and produces the output Z and Carry.
- The second full adder takes the input as A, C, and output of the first full adder “Carry” and produces the output as Y and X.
- Diagrammatic representation after combining two full adders is shown below:
- Circuit diagram:
- Combine the logic diagram of the two full adders that adds two two-bit binary numbers. The circuit diagram is shown below:
Truth table explanation:
- From the above circuit diagram:
- Boolean expression for Z:
- First, the inputs B and D are passed to XOR gate to produce the output as
- Next, pass the output of first XOR gate “
- First, the inputs B and D are passed to XOR gate to produce the output as
- Boolean expression for Carry:
- Next, pass the same inputs B and D from the first XOR gate to AND gate to produce the output as
- Next, pass again the output of first XOR gate “
- Finally, pass the output of first AND gate “
- Next, pass the same inputs B and D from the first XOR gate to AND gate to produce the output as
- Boolean expression for Y:
- First, the inputs A and C are passed to XOR gate to produce the output as
- Next, pass the output of first XOR gate “
- First, the inputs A and C are passed to XOR gate to produce the output as
- Boolean expression for X:
- Next, pass the same inputs A and C from the first XOR gate to AND gate to produce the output as
- Next, pass again the output of first XOR gate “
- Finally, pass the output of first AND gate “
- Next, pass the same inputs A and C from the first XOR gate to AND gate to produce the output as
- Boolean expression for Z:
- Therefore, the Boolean expression for combining two full adders produce X, Y, and Z.
Truth table for combining the two full adders:
| A | B | C | D | Carry-in | Z | Carry | Y | X | ||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
For example:
- If the inputs are A as 0, B as 0, C as 1, D as 0, and Carry-in as 0, then the full adder adds the two two-bit binary numbers as shown below:
- Then, it produces the output of X, Y, Z, and Carry. Truth table is shown below:
| A | B | C | D | Carry-in | Z | Carry | Y | X | ||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
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Chapter 4 Solutions
COMPUTER SCIENCE ILLUMIN.-TEXT
Ch. 4 - Prob. 1ECh. 4 - Prob. 2ECh. 4 - Prob. 3ECh. 4 - Prob. 4ECh. 4 - Prob. 5ECh. 4 - Prob. 6ECh. 4 - Prob. 7ECh. 4 - Prob. 8ECh. 4 - Prob. 9ECh. 4 - Prob. 10E
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