INTRO.TO COMPUTING SYSTEMS >INTL.ED.<
INTRO.TO COMPUTING SYSTEMS >INTL.ED.<
3rd Edition
ISBN: 9781260565911
Author: PATT
Publisher: MCG
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Chapter 3, Problem 22E

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Gate-level logic circuit:

  • The given truth table is as follows,
ABCZ
0001
0010
0100
0111
1000
1011
1101
1110
  • The gate-level logic circuit is created with three input AND gates and four input OR gate.
  • The number of OR gates and AND gates utilized for gate-level logic circuit is based on the truth table.
  • The required number of AND gate is the possible number of input combinations.
  • Few number of AND gates are reduced, when the input combination produces the output “0”.
  • The required number of OR gate is the number of output columns given in the truth table.
  • To draw the gate-level logic circuit for the given truth table, “23” which means “8” number of AND gates are used. But, the number of AND gates going to be used are reduced to “4” because, “4” number of input combinations in the truth table, produces the output “0”.
  • Similarly the number of OR gate to be used is “1” because, the number of output column given in the truth table is “1”

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