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You have arrived at an interview site for open IC design position. The site manager tells you that his group is working on a CMOS circuit design. He has asked you to do the following for him for the circuit shown below. DO Not Simplify this circuit.

You have arrived at an interview site for open IC design position. The site manager tells you that his group is working on a CMOS circuit design. He has asked you to do the following for him for the circuit shown below. DO Not Simplify this circuit.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Problem 4 You have arrived at an interview site for open IC design position. The site manager tells you that his group is working on a CMOS circuit design. He has asked you to do the following for him for the circuit shown below. DO Not Simplify this circuit. D ord Μι VDD M5 M2 Bo M7 M3 M4 M6 OF (A) Provide the function F in terms of inputs A, B, C and D. (B) Provide only one Euler's path for the function in part (A). Show the Euler's path. (C) In Electric, provide a layout for the Euler's path in Part (B). Show screen shots of DRC and the layout. (D) Provide IRSIM for the electric layout of part (C). Clearly mark inputs (A,B,C,D)=(1,0,1,0) and output F in one timing diagram from the top to bottom with order of timing waveforms A,B,C,D, F. Do not put your own inputs.
Transcribed Image Text:Problem 4 You have arrived at an interview site for open IC design position. The site manager tells you that his group is working on a CMOS circuit design. He has asked you to do the following for him for the circuit shown below. DO Not Simplify this circuit. D ord Μι VDD M5 M2 Bo M7 M3 M4 M6 OF (A) Provide the function F in terms of inputs A, B, C and D. (B) Provide only one Euler's path for the function in part (A). Show the Euler's path. (C) In Electric, provide a layout for the Euler's path in Part (B). Show screen shots of DRC and the layout. (D) Provide IRSIM for the electric layout of part (C). Clearly mark inputs (A,B,C,D)=(1,0,1,0) and output F in one timing diagram from the top to bottom with order of timing waveforms A,B,C,D, F. Do not put your own inputs.
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