Why are there limitations to increasing pipeline depth, even though it might seem to increase instruction throughput?
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Why are there limitations to increasing pipeline depth, even though it might seem to increase instruction throughput?
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- Pipelining is used because it improves instruction throughput, increasing the level of pipelining cuts the amount of work performed at each pipeline stage, allowing more instructions to exist on the processor at the same time and individual instructions to complete at a more rapid rate. However, throughput will not improve as pipelining is increased indefinitely. Give two reasons for this.Is it possible to achieve piplelined execution if the execution time of pipeline instruction execution is not balanced? What inefficiency do you see here?True/False Run times of the typical five stages to execute an instruction are as given in some units of time: Instruction Fetch: 10 Instruction Decode: 15 Execute: 30 Memory: 50 Write Back: 20 If this is implemented as a pipelined versus a non-pipelined machine, then depending on the absence of hazards, one could expect the speedup to be about 2.5.
- If the execution time of pipeline instruction execution is not balanced, what inefficiency must be introduced to allow the piplelined execution to occur? Describe this inefficiency.Pipelined execution without balanced pipeline instruction execution time? Inefficiency?What is the impact of pipeline width on instruction throughput?
- Explore the concept of instruction reordering for optimizing pipeline execution. How does the compiler influence instruction scheduling for pipelines?Assuming pipelining is used, what would be the execution time for a single load instruction to execute?When making changes to optimize part of a processor, it is often the case that speeding up one type of instruction comes at the cost of slowing down something else. For example, if we put in a complicated fast floating point unit, that takes space, and something might have to be moved farther away from the middle to accommodate it, adding an extra cycle in delay to reach that unit. The basic Amdahl?s law equation does not take into account this trade-off. a. If the new fast floating point unit speeds up floating point operations by, on average 2x, and floating operations take 20% of the original program's execution time, what is the overall speedup (ignoring the penalty to any other instructions)? b. Now assume that speeding up the floating point unit slowed down data cache accesses, resulting in a 1.5x (0r 2/3 speedup). Data cache accesses consume 10% of the execution time. What is the overall speedup now? c. After implementing the new floating point operations, what percentage of…
- Discuss the concept of instruction reordering in out-of-order execution pipelines. How does it improve instruction throughput, and what challenges does it introduce?How does speculative pipelining improve instruction throughput?Compilers and assemblers may be configured to sequence instructions in assembly language in such a manner that a pipeline is exposed to the least amount of risk that is practically possible. This reduces the likelihood of errors occurring. Pipeline design should aim to achieve this as one of its aims. Do all assemblers and compilers rearrange instructions provided in assembly language in the same manner in order to achieve the best degree of productivity that is possibly attainable?