When setting the Q-point of a JFET amplifier why is the bias circuit shown in Figure 3.1 (b) used rather than that shown in Figure 3.1 (a). + VDD + + RG1 VGS (a) tilt Vps Figure 3.1 RG2 VG (b) RD ¶ R$ Vs

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When setting the Q-point of a JFET amplifier why is the bias circuit shown
in Figure 3.1 (b) used rather than that shown in Figure 3.1 (a).
+ VDD
+
+
RG1
VGS
#
(a)
VDS
Figure 3.1
RG2
VG
(b)
RD
R₁
¡VD
Vs
Transcribed Image Text:When setting the Q-point of a JFET amplifier why is the bias circuit shown in Figure 3.1 (b) used rather than that shown in Figure 3.1 (a). + VDD + + RG1 VGS # (a) VDS Figure 3.1 RG2 VG (b) RD R₁ ¡VD Vs
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