The register we discussed in class has two inputs, D and clock, and one output, Q. If you are interested, you can access a simulator of this circuit at http://www.falstad.com/circuit/e-edgedff.html (note that that simulator has an extra output, !Q, below Q). If D is 1 as clock transitions from 0 to 1, which of the following is true? O A. Q is (or soon becomes) 0 B. Q is (or soon becomes) 1 C C. Q oscillates between 0 and 1 O D. Q holds a steady value, which could be 0 or 1

The register we discussed in class has two inputs, D and clock, and one output, Q. If you are interested, you can access a simulator of this circuit at http://www.falstad.com/circuit/e-edgedff.html (note that that simulator has an extra output, !Q, below Q). If D is 1 as clock transitions from 0 to 1, which of the following is true? O A. Q is (or soon becomes) 0 B. Q is (or soon becomes) 1 C C. Q oscillates between 0 and 1 O D. Q holds a steady value, which could be 0 or 1

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Question

The register we discussed in class has two inputs, D and clock, and one output, Q. If you are interested, you can access a simulator of this circuit at
http://www.falstad.com/circuit/e-edgedff.html (note that that simulator has an extra output, !Q, below Q).
If D is 1 as clock transitions from 0 to 1, which of the following is true?
A. Q is (or soon becomes) 0
B. Q is (or soon becomes) 1
C. Q oscillates between 0 and 1
D. Q holds a steady value, which could be 0 or 1

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