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The 32-bit RISC-V base integer instruction set (rv32i) does not support multiplication and division operations. To deal with this, a compiler may call a function when a multiplication is needed. For example, gcc expects that a function -mulsi3(unsigned int a, unsigned int b) is provided to multiply two integers. A multiplication can be carried out by repeated additions and shifts: unsigned int __mulsi3 (unsigned int a, unsigned int b) { unsigned int r = 0; while (a) { if (a & 1) { r += b; } a >>= 1; b <<= 1; } return r;

The 32-bit RISC-V base integer instruction set (rv32i) does not support multiplication and division operations. To deal with this, a compiler may call a function when a multiplication is needed. For example, gcc expects that a function -mulsi3(unsigned int a, unsigned int b) is provided to multiply two integers. A multiplication can be carried out by repeated additions and shifts: unsigned int __mulsi3 (unsigned int a, unsigned int b) { unsigned int r = 0; while (a) { if (a & 1) { r += b; } a >>= 1; b <<= 1; } return r;

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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The 32-bit RISC-V base integer instruction set (rv32i) does not support multiplication and division operations. To deal with this, a compiler may call a function when a multiplication is needed. For example, gcc expects that a function - mulsi3(unsigned int a, unsigned int b) is provided to multiply two integers. A multiplication can be carried out by repeated additions and shifts: unsigned int -_mulsi3 (unsigned int a, unsigned int b) { unsigned int r = 0; while (a) { if (a & 1) { r += b; } a >>= 1; b <<= 1; } return r; } a) Translate the above C code into equivalent RISC-V rv32i assembler code. Comment the as- sembler code to explain how the calculation proceeds. Note that the arguments are passed via the registers a0 (x10) and a1 (x11) and that the result is returned in a0 (x10). b) Does the function need function call prolog and epilog? Explain why or why not. You are invited to use emulsiV to develop and test your assembler code.
Transcribed Image Text:The 32-bit RISC-V base integer instruction set (rv32i) does not support multiplication and division operations. To deal with this, a compiler may call a function when a multiplication is needed. For example, gcc expects that a function - mulsi3(unsigned int a, unsigned int b) is provided to multiply two integers. A multiplication can be carried out by repeated additions and shifts: unsigned int -_mulsi3 (unsigned int a, unsigned int b) { unsigned int r = 0; while (a) { if (a & 1) { r += b; } a >>= 1; b <<= 1; } return r; } a) Translate the above C code into equivalent RISC-V rv32i assembler code. Comment the as- sembler code to explain how the calculation proceeds. Note that the arguments are passed via the registers a0 (x10) and a1 (x11) and that the result is returned in a0 (x10). b) Does the function need function call prolog and epilog? Explain why or why not. You are invited to use emulsiV to develop and test your assembler code.
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