Specify the size of a ROM (number of words and number of bits per word) that will accommodate the truth table for the following combinational circuit components: (a) a binary multiplier that multiplies two 4-bit, (b) a 4-bit adder-subtractor, (c) a quadruple 2-to-1-line multiplexers with common select and enable inputs, and (d) a BCD-to-seven-segment decoder with an enable input.

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
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Specify the size of a ROM (number of words and number
of bits per word) that will accommodate the truth table
for the following combinational circuit components:
(a) a binary multiplier that multiplies two 4-bit,
(b) a 4-bit adder-subtractor,
(c) a quadruple 2-to-1-line multiplexers with common
select and enable inputs, and
(d) a BCD-to-seven-segment decoder with an enable
input.
Transcribed Image Text:Specify the size of a ROM (number of words and number of bits per word) that will accommodate the truth table for the following combinational circuit components: (a) a binary multiplier that multiplies two 4-bit, (b) a 4-bit adder-subtractor, (c) a quadruple 2-to-1-line multiplexers with common select and enable inputs, and (d) a BCD-to-seven-segment decoder with an enable input.
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