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Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count.) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above.

Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count.) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Help me draw missing wires please help
Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count.) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above. 7493 +5V 2Ro(1) Ro(2) 7408 VcC 14 QA12 19 clock LEDO ,220 QB 18 QC 11 10 GND QD AirSupplyLab.com
Transcribed Image Text:Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count.) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above. 7493 +5V 2Ro(1) Ro(2) 7408 VcC 14 QA12 19 clock LEDO ,220 QB 18 QC 11 10 GND QD AirSupplyLab.com
4:45 ( Notes ... March 3, 2021 at 4:45 PM Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above. 7493 +SV 7408 vcc R12) clock LEDO20 QB ac 10 GND AirSupplylab.com Question 3. For each logic function, draw the wiring diagram of the logic gate (include the pin numbers) in your lab report. You can print out the following wiring diagrams, hand drawing the connections, then scan them to your report. a new cycle of 4 counts begins each time QB falls, select a negative edge trigger for the 4. channel that displays QB. (Make sure the trigger level lies within QB's waveform.) Screenshot the oscilloscope waveforms for QB and the AND output in your lab report. Repeat for a NAND, OR, XOR, and NOR (do the NOR last since it requires some wiring changes). Leave the scope settings alone as you change gates so QB will look the same in all 5 images. ( Notice: Unplug the +5v wire every time when you are rewiring the connections.) Connection for 7408 AND Connection for 7400 NAND Connection for 7432 OR Connection for 7486 XOR Connection for 7402 NOR ADALMI000 GND ::::: : ::: : ::::: ::::: SV clock 7408 1220 ch AND gate Output QB
Transcribed Image Text:4:45 ( Notes ... March 3, 2021 at 4:45 PM Set up the 7493 as the binary counter of Lab 02. (Ground at least one reset input or the chip won't count) Since counter outputs go through all possible combinations in binary order, they can be used to test the behavior of the various gates listed above. 7493 +SV 7408 vcc R12) clock LEDO20 QB ac 10 GND AirSupplylab.com Question 3. For each logic function, draw the wiring diagram of the logic gate (include the pin numbers) in your lab report. You can print out the following wiring diagrams, hand drawing the connections, then scan them to your report. a new cycle of 4 counts begins each time QB falls, select a negative edge trigger for the 4. channel that displays QB. (Make sure the trigger level lies within QB's waveform.) Screenshot the oscilloscope waveforms for QB and the AND output in your lab report. Repeat for a NAND, OR, XOR, and NOR (do the NOR last since it requires some wiring changes). Leave the scope settings alone as you change gates so QB will look the same in all 5 images. ( Notice: Unplug the +5v wire every time when you are rewiring the connections.) Connection for 7408 AND Connection for 7400 NAND Connection for 7432 OR Connection for 7486 XOR Connection for 7402 NOR ADALMI000 GND ::::: : ::: : ::::: ::::: SV clock 7408 1220 ch AND gate Output QB
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