A hard disk has 32 sectors/ track, 10 platters each with 2 recording surface and 1000 cylinders. The address of a sector is given as where c is cylinder no., h is for surface no., s is for sector no. Thus the 0th sector is addressed as <0, 0, 0>, 1st sector as <0, 0, 1> and so on. Then the address <200, 8, 20> corresponds to which sector no.?

A hard disk has 32 sectors/ track, 10 platters each with 2 recording surface and 1000 cylinders. The address of a sector is given as where c is cylinder no., h is for surface no., s is for sector no. Thus the 0th sector is addressed as <0, 0, 0>, 1st sector as <0, 0, 1> and so on. Then the address <200, 8, 20> corresponds to which sector no.?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

There are many parameters that could be used to describe disk performance; among them are: number of bits per track disk capacity (in bits) number of disk surfaces rotational speed rotational latency transfer rate tracks per surface sectors per track blocks per track sectors per block seek time speed of disk arm block-read time number of blocks Some of these parameters are independent, and others are (approximately) linearly related. That is, doubling one doubles the other. Decide which of these parameters are linearly related. Then, select from the list below, the relationship that is true, to within a close approximation. Note: none of the statements may be true exactly, but one will always be much closer to the truth than the other three. Also note: you should assume all dimensions and parameters of the disk are unchanged except for the ones mentioned. a) If you divide tracks into half as many blocks, then you double the read time for a block.…
Suppose the RAM for a certain computer has 4M words, where each word is 16 bits long. What is the capacity of this memory expressed in bytes? If this RAM is byte addressable, how many bits must an address contain? If this RAM is word addressable, how many bits must an address contain?
Suppose that a magnetic disk has an average seek time of 4 ms, a rotation rate of 5400 RPM, a transfer rate of 50 MB/second, a sector size of 512 bytes, and controller overhead of 2 ms. What is the average amount of time to read a single sector?
Student information is stored in a data area, and each student entry is formatted as follows:The first nine bytes are the student ID in ASCII format.The following byte is the course score.The following phrase is the section identifier. There are over 300 such student records in memory, which have been loaded consecutively beginning at address $10000. To indicate the conclusion of the records, the last record loaded is a dummy record with a section identifier of $FFFF. Create an assembler subroutine GetMax that searches the complete list for the highest mark. If there is a tie, the student with the highest score on the list should be found. The beginning address of the subroutine should be returned.
A certain disk can read data at a rate of 515.2 MB/s. How many books can be read in 4 seconds if an "average" book has69 pages,20 lines per page,9 words per line,6 characters per word,and each character is one of 100 different characters where the fewest number of bits are used to represent each character?
Giventhe following assignment of some program’s virtual pages to physical pages in a system with 4 KiB byte pages, what physical memory address corresponds to virtual address 20000? (All values are given in decimal.)
A CPU that supports little endian format reads two integer (4-byte) values from address 0x1000 and 0x2000. The values read are 55 and 6850 respectively. Please show the memory contents (byte-wise) at address 0x1000 and 0x2000?
let S: r1(x);r2(x);w1(x):r1(x);w2(x);w1(y). Schedule S is said to be Select one: a. no serial and no serializable b. no serial and serializable C. serial d. none of the above
Suppose a computer using direct mapped cache has 224 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?
list: .word 3, 0, 1, 2, 6, -2, 4, 7, 3, 7 size: .word 10 Develop a mips code with a Mars simulator that reads this sequence and counts those <0 (negative) and >=0 (zero or positive) and prints what it finds to the screen.
1. Suppose you have designed a Register File. Let say this file contains 64 registers, and each register can store 18-bit data. Then, you have designed an n bit ALU with 4 operations. From the information given above, what will be the value of RS RT RD and n Why?