RS Flip-Flop using NAND or NOR Gates
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1. Create the RS Flip-Flop using NAND or NOR Gates (its equivalent circuit) IC.
2. Then, use that flip-flop to design an 8-bit register memory using cascaded RS Flip-Flop.
3. Use toggle switches for the data and pushbutton switches for storing and clearing the memory.
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- 4) Design and draw these memory units with their control circuits. Explain operations. a) A single EPROM 2716 is used with an 8088 microprocessor so that this microprocessor will see only X bytes of memory between the address range of DF800 –DFFFF or DD800 - DDFFF instead of 1M byte that it expects. Draw this circuit. What are X bytes? Do not use 74138 decoders. b) Design and show a 16K x 16-bit memory circuit by using 8K x 8-bit RAMS. Explain its operation. Do not use decoder 74138 chip.A d. B Figure 1 3. Referring to the logic circuit in Figure 1, determine: a. The simplified Boolean expression. b. The output waveform. C H c. Due to fabrication errors, lines d and f were shorted to the supply voltage. What happens to the output of the circuit? d. Your hardware resources are limited to 2-input NOR gate only. Draw the gate schematic of the simplified Boolean expression in 3(a).Design a serial adder using the following: Explain the operation briefly, list thestate table (must include present state, inputs, next state, output and flip-flopinputs) and draw the logic diagrama. Using D flip flop, shift registers and necessary logic gatesb. Using JK flip flop, shift registers and necessary logic gates
- 4. Design an Octal Counter with D flip-flops. a) Draw the state diagram b) Draw the state table c) Draw the counter circuitThe logic diagram of JK flip-flop is given in Figure 3.a) Write the output Boolean functions for the outputs.b) Draw the timing diagram of the circuit on Figure 4. Assume that the delay between JK inputsand QQ outputs is 1 unit. Each column in Figure 4 represents 1 unit.9 Using D flip-flops, (a) Design a counter with the following repeated binary sequence: 0, 1, 2, 4, 6. (b) Draw the logic diagram of the counter. (c) Design a counter with the following repeated binary sequence: 0, 2, 4, 6, 8. (d) Draw the logic diagram of the counter.
- 10.Draw the logic symbal fora NOT gate and create its truth table. 11.Draw the logic symbol for an inverter and create its truth table.Design a 4-bit synchronous binary upcounter using T flip-flops. Draw only the logic diagram. Please show the process.4) Draw a logic diagram of a divide-by-14 counter using IC 7493 and 2-input AND gate.
- Design a three bit synchronous binary counter that counts two by two with T-flipflops,continously. Output should be one when the counter equals maximum number.a. Draw the exitation table b. Draw the corresponding state diagram. c. Tabulate the state table for the sequential circuit. d. Draw the logic diagram of the circuit.5- a- what are the application of Flip – Flop. b- What is the difference between the Flip – Flop circuit and the other combinational logic circuits?You are asked to design a synchronous counter that will count the sequence 1 > 2>3>1. (a) Represent these decimal numbers in 2 bits binary numbers. (b) Write down the state table. (c) Find the functions for the next state of the state table using K-map. (d) Draw the circuit (You need to consider D flip-flops as memory unit).