Question (a) Design a circuit using D flip-flops that can be used to divide the clock frequency by 16. (b) Draw the input and output waveforms for each stage to the circuit designed in part (a).

Y=f(A,B,C)=(0,4,5)+don't care(2)

Design Master-Slave Flip Flop circuit diagram and write a short description.

We need to generate a PWM signal with frequency of 2 KHz, and duty cycle of 20%. The clock frequency is 1 MHz and the counter is configured in count-up-down mode. Determine the values that we need to write in LOAD and COMPARE registers. You can use either pwmA or pwmB.

(a) Consider the flipflop circuits below: (i) Name the 2 circuits given in the figure. Explain how they are different from each other. a. b. (ii) Choose from the list the input that triggers data to travel to the next flipflop in a counter. A: Input at top NAND gate B: Input at bottom NAND gate C: Clock input clk Q

Question No. 4  hand written withn expanation (a) Design a circuit using D flip-flops that can be used to divide the clock frequency by 16. (b) Draw the input and output waveforms for each stage to the circuit designed in part (a).

I need the answer as soon as possible

A 9 bit asynchronous counter has a 128 - kHz clock signal applied. i) What the mod Number of this counter ? ii) What will be the frequency at the MSB output ? iii) Assume that the counter starts at zero.What will be the count after 6.15 input pulse?

need hand written

Solve in 8086 microprocessor