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question 7.21

question 7.21

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Microelectronic_Circuits_by_Sedra_Smith.pdf - Foxit Reader O File Home Comment Fill & Sign View Form Protect Share Connect Help O Tell me what you want to do... 7.26(b) O SnapShot B Clipboard - Ô Fit Page T D Fit Width O 75% A Link O File Attachment TI Rotate Left A Bookmark e Image Annotation Hand Select Actual Reflow Typewriter Highlight D Fit Visible Rotate Right O Audio & Video Size Tools View Comment Links Insert 福听PDF转Word Start Microelectronic_Circuits_... (g) What is the value of the de base current I, at the bias point? Assume B= 100. Characterize the signal current i, that will be superimposed on the base current I over the range 10 µA to 40 µA? If the BJT is biased at Vg = Vec: find the value of I, and I. If at this current VaE = 0.7 V and if R, = 100 k2, find the required value of Vu (h) Dividing the amplitude of v by the amplitude of i, evaluate the incremental (or small-signal) input resistance of the amplifier. (i) Sketch and clearly label correlated graphs for vRE, VCE ic, and i, versus time. Note that each graph consists of a dc or average value and a superimposed sine wave. Be careful of the phase relationships of the sine waves. *7.22 Sketch the i-vg characteristics of an npn transistor having B = 100 and V, = 100 V. Sketch characteristic curves for i, -20 μΑ, 50 μΑ , 80 μΑ, and 100 μA. For the purposc f this sketch, assume that ic = Big at vce = 0. Also, sketch the load line obtained for Vec = 10 V and Re =1 k2. If the de bias current into the base is 50 µA, write the equation for the corresponding i-vcg curve. Also, write the equation for the load line, and solve the two equations to obtain Veg and le. 7.20 The essence of transistor operation is that a change If the input signal causes a sinusoidal signal of 30-uA peak amplitude to be superimposed on I,, find the corresponding signal components of in vsg, Avg, produces a change in ic, Aic. By keep- ing Avar small, Aic is approximately linearly related to AUsg, Aic = gA VRE, where g is known as the transistor transconductance. By passing Aic through Re, an output voltage signal Av, is obtained. Use the expression for the small-signal voltage gain in Eq. (7.20) to derive an expression Section 7.2: Small-Signal Operation for g.. Find the value of g, for a transistor biased at I, = 0.5 mA. and veg and Models *7.23 This problem investigates the nonlinear distortion 7.21 The purpose of this problem is to illustrate the applica- introduced by a MOSFET amplifier. Let the signal v tion of graphical analysis to the circuit shown in Fig. P7,21. be a sine wave with amplitude V, and substitute v,= Sketch i-vce characteristic curves for the BJT for i, = 10 μΑ, 20 μΑ , 30 μA, and 40 μΑ. Assume the lines to be horizontal (i.e., neglect the Early effect), and let B=100. For Ve = 5 V and Re = 1 k2, sketch the load line. What peak-to-peak collector voltage swing will result for i, varying sin wt in Eq. (7.28). Using the trigonometric identity sin'e = !- cos 20, show that the ratio of the signal at frequency 20 to that at frequency a, expressed as a percentage (known as the second-harmonic distortion) is Second-harmonic distortion = 4 V х 100 ov If in a particular application V is 10 mV, find the minimum overdrive voltage at which the transistor should be operated so that the second-harmonic distortion is kept to less than 1%. Rc 7.24 Consider an NMOS transistor having k = 10 mA/V. Let the transistor be biased at Vay = 0.2 V. For operation in saturation, what de bias current /, results? If a 0.02-V signal is superimposed on Vas, find the corresponding increment in collector current by evaluating the total collector current i, and subtracting the de bias current Ip. Repeat for a -0.02-V signal. Use these results to estimate g, of the FET at this bias point. Compare with the value of g. obtained using Eq. (7.33). Rg Figure P7.21 SIM = Multisim/PSpice; * = difficult problem; ** = more difficult; *** = very challenging; D = design problem 11 483 (512 / 1489) 75% 12:39 PM O Type here to search 日 96% 1 4») G ENG 11/4/2021 CHAPTER 7 PROBLEMS
Transcribed Image Text:Microelectronic_Circuits_by_Sedra_Smith.pdf - Foxit Reader O File Home Comment Fill & Sign View Form Protect Share Connect Help O Tell me what you want to do... 7.26(b) O SnapShot B Clipboard - Ô Fit Page T D Fit Width O 75% A Link O File Attachment TI Rotate Left A Bookmark e Image Annotation Hand Select Actual Reflow Typewriter Highlight D Fit Visible Rotate Right O Audio & Video Size Tools View Comment Links Insert 福听PDF转Word Start Microelectronic_Circuits_... (g) What is the value of the de base current I, at the bias point? Assume B= 100. Characterize the signal current i, that will be superimposed on the base current I over the range 10 µA to 40 µA? If the BJT is biased at Vg = Vec: find the value of I, and I. If at this current VaE = 0.7 V and if R, = 100 k2, find the required value of Vu (h) Dividing the amplitude of v by the amplitude of i, evaluate the incremental (or small-signal) input resistance of the amplifier. (i) Sketch and clearly label correlated graphs for vRE, VCE ic, and i, versus time. Note that each graph consists of a dc or average value and a superimposed sine wave. Be careful of the phase relationships of the sine waves. *7.22 Sketch the i-vg characteristics of an npn transistor having B = 100 and V, = 100 V. Sketch characteristic curves for i, -20 μΑ, 50 μΑ , 80 μΑ, and 100 μA. For the purposc f this sketch, assume that ic = Big at vce = 0. Also, sketch the load line obtained for Vec = 10 V and Re =1 k2. If the de bias current into the base is 50 µA, write the equation for the corresponding i-vcg curve. Also, write the equation for the load line, and solve the two equations to obtain Veg and le. 7.20 The essence of transistor operation is that a change If the input signal causes a sinusoidal signal of 30-uA peak amplitude to be superimposed on I,, find the corresponding signal components of in vsg, Avg, produces a change in ic, Aic. By keep- ing Avar small, Aic is approximately linearly related to AUsg, Aic = gA VRE, where g is known as the transistor transconductance. By passing Aic through Re, an output voltage signal Av, is obtained. Use the expression for the small-signal voltage gain in Eq. (7.20) to derive an expression Section 7.2: Small-Signal Operation for g.. Find the value of g, for a transistor biased at I, = 0.5 mA. and veg and Models *7.23 This problem investigates the nonlinear distortion 7.21 The purpose of this problem is to illustrate the applica- introduced by a MOSFET amplifier. Let the signal v tion of graphical analysis to the circuit shown in Fig. P7,21. be a sine wave with amplitude V, and substitute v,= Sketch i-vce characteristic curves for the BJT for i, = 10 μΑ, 20 μΑ , 30 μA, and 40 μΑ. Assume the lines to be horizontal (i.e., neglect the Early effect), and let B=100. For Ve = 5 V and Re = 1 k2, sketch the load line. What peak-to-peak collector voltage swing will result for i, varying sin wt in Eq. (7.28). Using the trigonometric identity sin'e = !- cos 20, show that the ratio of the signal at frequency 20 to that at frequency a, expressed as a percentage (known as the second-harmonic distortion) is Second-harmonic distortion = 4 V х 100 ov If in a particular application V is 10 mV, find the minimum overdrive voltage at which the transistor should be operated so that the second-harmonic distortion is kept to less than 1%. Rc 7.24 Consider an NMOS transistor having k = 10 mA/V. Let the transistor be biased at Vay = 0.2 V. For operation in saturation, what de bias current /, results? If a 0.02-V signal is superimposed on Vas, find the corresponding increment in collector current by evaluating the total collector current i, and subtracting the de bias current Ip. Repeat for a -0.02-V signal. Use these results to estimate g, of the FET at this bias point. Compare with the value of g. obtained using Eq. (7.33). Rg Figure P7.21 SIM = Multisim/PSpice; * = difficult problem; ** = more difficult; *** = very challenging; D = design problem 11 483 (512 / 1489) 75% 12:39 PM O Type here to search 日 96% 1 4») G ENG 11/4/2021 CHAPTER 7 PROBLEMS
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