QUESTION 3 The following figure shows a sequential circuit with three D Flip Flops with a common input clock. Note that the inverted output of the first flip-flop ) is connected to the input of the second flip-flop (D input of the far right flip flop). Assume that the flip flops are initialized at '1'. That is, Q1 = Qo = 1 during Cycle 0. This means the output of this circuit is initially Q1Q0 = '11'. 1. Compute the value of each output signal (Q1, and Qo) for 10 cycles using the table below. 2. Convert the 2-bit binary Q1Q0 to its equivalent decimal in the table. O Q0 -ㅇ Q1 A O BO cik o Clock Cyele A B Qo 1 1 1 1 1 2 1 1 7. 9. 1 10

QUESTION 3 The following figure shows a sequential circuit with three D Flip Flops with a common input clock. Note that the inverted output of the first flip-flop ) is connected to the input of the second flip-flop (D input of the far right flip flop). Assume that the flip flops are initialized at '1'. That is, Q1 = Qo = 1 during Cycle 0. This means the output of this circuit is initially Q1Q0 = '11'. 1. Compute the value of each output signal (Q1, and Qo) for 10 cycles using the table below. 2. Convert the 2-bit binary Q1Q0 to its equivalent decimal in the table. O Q0 -ㅇ Q1 A O BO cik o Clock Cyele A B Qo 1 1 1 1 1 2 1 1 7. 9. 1 10

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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= 1 causes the heater to decrease its Q3: A Moore sequential circuit has three inputs (X2, X1, and Xo) that specify a temperature range in a room. The circuit has two outputs (I and D) that control a heater for the room; I = 1 causes the heater to increase its heat output, and D heat output. If the temperature range is 0, 1, or 2 for three successive clock cycles, the circuit generates I = 1, and conversely if the temperature range is 5, 6, or 7 for three successive clock cycles, the circuit generates D = 1; otherwise, I = 0 and D = 0. 1. Draw a state diagram. 2. Construct a state table. 3. Using D flip-flops, construct a state assigned table. 4. Determine the next-state and output logic expressions. 5. Sketch the corresponding logic circuit.
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