QUESTION 3: The diff-amp configuration shown in Figure 11.7 is biased at 3.3 V and -3.3 V. The maximum power dissipation in the entire circuit is to be no more than 1.2 mW when v₁ = ₂ = 0. The available transistors have parameters: ß= 130, VBE(on) = 0.71 V, and V₁ = 00. Design the circuit to produce the maximum possible differential-mode voltage gain, but such that the common-mode input voltage can be within the range - 0.91 < "CM<0.91 V and the transistors are still biased in the forward-active region. What is the value of Ad? R₁ (kn) Format: 67.42 Format : 48.55 Rc (kn) 8m (mA/V) Format: 8.3846 Ad Format: 66.55 R₁ IC₁Rc Ic₂ RC VI 2₂ 24 Figure 11.7 ICA -0 U₂

QUESTION 3: The diff-amp configuration shown in Figure 11.7 is biased at 3.3 V and -3.3 V. The maximum power dissipation in the entire circuit is to be no more than 1.2 mW when v₁ = ₂ = 0. The available transistors have parameters: ß= 130, VBE(on) = 0.71 V, and V₁ = 00. Design the circuit to produce the maximum possible differential-mode voltage gain, but such that the common-mode input voltage can be within the range - 0.91 < "CM<0.91 V and the transistors are still biased in the forward-active region. What is the value of Ad? R₁ (kn) Format: 67.42 Format : 48.55 Rc (kn) 8m (mA/V) Format: 8.3846 Ad Format: 66.55 R₁ IC₁Rc Ic₂ RC VI 2₂ 24 Figure 11.7 ICA -0 U₂

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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