Question 1: Assume a computer that has 32-bit integers. Show how each of the followingvalues would be stored sequentially in memory, starting at address 0x100, assuming eachaddress holds one byte. Be sure to extend each value to the appropriate number of bits. Youwill need to add more rows (addresses) to store all five values.a) OxAB123456b) 0x2BF876c) 0x8B0A1d) Ox1e) 0xFEDC1234Byte OrderAddressBig EndianLittle EndianOx1000x101Ox1020x1030x1040x1050x106Ox107

Memory Addressing: The memory addresses start from 0x100 and go sequentially. Each address…

Answered: Question 1: Assume a computer that has…

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

For each question, give the following three values for the last line of each code block following the execution of the entire block: 1. the memory address which that line writes to, 2. the value that is written to that address, and 3. the number of distinct memory reads required by that line. If you cannot determine the memory address from the information given, enter 0 for the address. When computing the number of memory reads, assume nothing about the value of registers prior to the execution of the last statement: count a read even if the previous line also read (or wrote) the location. Count the number of distinct memory locations read by that statement; that is, if the line reads a memory location multiple times, count it only once. Assume that memory accesses always succeed, i.e. that all memory addresses are accessible to the program. For example, for the following code block: int *foo (int *)0x1000; int *bar = (int *)0x1000; *foo = 1; *foo=foo + *bar + 1; you would answer…
A virtual memory has a page size of 16 words. There are 8 pages and 4 blocks. The associative memory page table contains the following entries. (Addresses are given HEX form): Page Block a) For the following virtual addresses find the CPU addresses: 3A, 5B, 1 3 b) For the following CPU addresses find the virtual addresses: 0C, 2D 1 4
1. Suppose an array with six rows and eight columns is stored in a row major order starting at address 20 (base 10). If each entry in the array requires only one memory cell, what is the address on the entry in the third row and fourth columns? What if each entry requires two memory cells?
Giventhe following assignment of some program’s virtual pages to physical pages in a system with 4 KiB byte pages, what physical memory address corresponds to virtual address 20000? (All values are given in decimal.)
4. Suppose a computer using a fully associative cache has 2^24 byte of byte-addressable main memory and a cache of 128 blocks, where each block contains 64 bytes. a) How big in kilobytes is main memory? b) How big in bytes is cache? In kilobytes? c) How many blocks of main memory are there? d) What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? e) To which cache block will the memory address 0x01D8729A map?
Q.2 Suppose a system has a logical address space of size 25 (m=5), a page size of 4 bytes, and a physical memory of 128 bytes. Given the following page table, find out the respective physical addresses for each of the logical address listed in Table 2. (Note: all addresses are expressed in decimal number system) Table 1: Page table 0 2 5 7 0 15 1 2 3 4 5 18 6 20 7 22 Table 2: Fill out this table with corresponding physical memory addresses Logical Address Physical Address 0 6 10 17 23
1- Write a MIPS assembly program that stores the values in consecutive successive words in the data segment with the initial offset 3000A, ending at offset 3FFEB. Then store the value 3000F to location 1000F. Next, write a code segment that sums the 128 words starting at the address found in location 1000F. This portion of the program cannot assume that 1000B contains 3000A. Print the sum and then quit. 2- Write a MIPS program that access an array of words starting at address 1000F and memory, of the length specified by the value in cx, and searches the maximum value in the array. Print the value after finding an element. 3- Write a MIPS assembly language program to reverse the numbers for two dimensional array of size 4X4
A computer of 32 bits has a cache memory of 64 KB with a cache line size of 64 bytes. The cache access time is 20 ns, and the miss penalty is 120 ns. The cache is 2-way associative. a) What is the number of cache lines? b) What is the number of cache sets? c) What is the number of lines per set? d) Draw a scheme of this cache. e) Calculate the time to read a word in case of miss.
Exercise 1: Consider a word-addressable memory of 16 GB, where each word is composed of 128 bits. This memory is directly mapped to a cache of 1 MB composed of blocks where each block contains 16 words. a) What is length (in bits) of the address provided by the processor? b) What is the length (in Bytes) of one memory block? c) How many lines does the cache have? d) What is the length (in bits) of each of the TAG, LINE, and OFFSET? e) Which line in cache can hold the address 00000FOF?
Let's say p contains a memory address and the 8 bytes in memory beginning at that address are (in hex): 01 12 23 34 45 56 67 78. If p's type is "uint32_t *", what is the value of x on a little-endian computer after executing: uint32_t x = p[0]; Ox01122334 Ox0112233445566778 Ox34231201 Ox7867564534231201 O O O O
Suppose a computer using direct mapped cache has 224 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?
Suppose a computer using fully associative cache has 224 words of main memory and a cache of 512 blocks, where each cache block contains 16 words. How many blocks of main memory are there? What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? To which cache block will the memory reference 17042416 map?

SEE MORE QUESTIONS

Recommended textbooks for you

Database System Concepts

Computer Science

ISBN:

9780078022159

Author:

Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:

McGraw-Hill Education

Starting Out with Python (4th Edition)

Computer Science

ISBN:

9780134444321

Author:

Tony Gaddis

Publisher:

PEARSON

Digital Fundamentals (11th Edition)

Computer Science

ISBN:

9780132737968

Author:

Thomas L. Floyd

Publisher:

PEARSON

Database System Concepts

Computer Science

ISBN:

9780078022159

Author:

Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:

McGraw-Hill Education

Starting Out with Python (4th Edition)

Computer Science

ISBN:

9780134444321

Author:

Tony Gaddis

Publisher:

PEARSON

Digital Fundamentals (11th Edition)

Computer Science

ISBN:

9780132737968

Author:

Thomas L. Floyd

Publisher:

PEARSON

C How to Program (8th Edition)

Computer Science

ISBN:

9780133976892

Author:

Paul J. Deitel, Harvey Deitel

Publisher:

PEARSON

Database Systems: Design, Implementation, & Manag…

Computer Science

ISBN:

9781337627900

Author:

Carlos Coronel, Steven Morris

Publisher:

Cengage Learning

Programmable Logic Controllers

Computer Science

ISBN:

9780073373843

Author:

Frank D. Petruzella

Publisher:

McGraw-Hill Education

SEE MORE TEXTBOOKS