Q5:35i Given a memory hierarchy with two levels of cache, L1 and L2, a main memory, and the following access time in cycles and associated miss rates: Memory Access time in Cycles Miss Rate L 11 10% AMAT = L2 10 1% Main Memory 100 What is the AMAT of this system? Show your work below and write

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...
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Q5:35i Given a memory hierarchy with two levels of cache, L1 and L2, a main memory, and the following
access time in cycles and associated miss rates:
Memory
Access time in Cycles
Miss Rate
L
11
10%
AMAT=
L2
10
1%
Main Memory
100
What is the AMAT of this system? Show your work below and write
Transcribed Image Text:Q5:35i Given a memory hierarchy with two levels of cache, L1 and L2, a main memory, and the following access time in cycles and associated miss rates: Memory Access time in Cycles Miss Rate L 11 10% AMAT= L2 10 1% Main Memory 100 What is the AMAT of this system? Show your work below and write
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